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Intel® AVX and CPU Instructions

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Support for Intel® AVX, which provide the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC).

 
Thema / Thema-Starter Beitragsdatumabsteigend sortieren Antworten Letzter Beitrag
Normales Thema Question about the PUSH instruction
von millersd » Mi, 30/04/2008 - 15:55
Mi, 30/04/2008 - 15:55 2
von millersd
Di, 13/05/2008 - 07:56
Normales Thema looking for information sources on code optimization using the Intel CPU and the MMX/SSE family instruction set
von amoshkov » Fr, 09/05/2008 - 12:21
Fr, 09/05/2008 - 12:21 4
von srimks
Fr, 09/05/2008 - 12:21
Normales Thema bit interleave instruction
von torusle » Sa, 17/05/2008 - 16:33
Sa, 17/05/2008 - 16:33 9
von sirrida
Mi, 04/07/2012 - 04:37
Normales Thema crc32 emulation support
von tinman8088 » So, 25/05/2008 - 21:28
So, 25/05/2008 - 21:28 3
von Igor Levicki
So, 25/05/2008 - 21:28
Normales Thema Question about CRC32 instruction polynomial
von Igor Levicki » Di, 27/05/2008 - 10:29
Di, 27/05/2008 - 10:29 5
von doug.mtview
Fr, 14/08/2009 - 17:36
Normales Thema CPU recommendation?
von audiobahn1000 » Fr, 30/05/2008 - 03:16
Fr, 30/05/2008 - 03:16 1
von Igor Levicki
Fr, 30/05/2008 - 03:16
Normales Thema SSE2 - Class crash with SSE related members
von obscurity » Do, 05/06/2008 - 04:54
Do, 05/06/2008 - 04:54 13
von Igor Levicki
So, 27/07/2008 - 19:54
Normales Thema Int64 <-> double conversion with SSE?
von pvercello » Sa, 07/06/2008 - 02:33
Sa, 07/06/2008 - 02:33 6
von wmula
Fr, 13/06/2008 - 17:50
Normales Thema strlen with SSE4.2 instructions
von wmula » Sa, 07/06/2008 - 15:10
Sa, 07/06/2008 - 15:10 2
von Shih Kuo (Intel)
Mo, 21/07/2008 - 22:47
Normales Thema performance issues with SSE2
von s.gautam » Di, 10/06/2008 - 11:41
Di, 10/06/2008 - 11:41 3
von TimP (Intel)
Di, 10/06/2008 - 11:41
Normales Thema Anyone thinking of setting low-width integars with high-width integars?
von kalven » Mo, 16/06/2008 - 01:56
Mo, 16/06/2008 - 01:56 2
von kalven
Do, 19/06/2008 - 18:52
Normales Thema Core 2 MSR register documentation
von elmo234 » Di, 17/06/2008 - 10:24
Di, 17/06/2008 - 10:24 8
von yuhong2
Di, 17/06/2008 - 10:24
Normales Thema Compute eflags
von hunter123 » Di, 17/06/2008 - 14:00
Di, 17/06/2008 - 14:00 1
von Igor Levicki
So, 27/07/2008 - 20:36
Normales Thema Software consequences of extending XMM to YMM
von Agner » Mi, 18/06/2008 - 02:33
Mi, 18/06/2008 - 02:33 13
von TimP (Intel)
Fr, 25/03/2011 - 08:52
Gefragtes Thema sse execution units in core duo
von s.gautam » Mi, 18/06/2008 - 04:23
Mi, 18/06/2008 - 04:23 23
von maa1
Mi, 18/06/2008 - 04:23
Normales Thema CPU temperature Pentium 4
von abdekker » Mi, 18/06/2008 - 10:07
Mi, 18/06/2008 - 10:07 1
von Igor Levicki
Do, 10/07/2008 - 21:01
Normales Thema SSE Optimization
von mpdelbuono » Do, 19/06/2008 - 06:43
Do, 19/06/2008 - 06:43 2
von Shih Kuo (Intel)
Do, 19/06/2008 - 10:50
Normales Thema Where can I find documents about SSE3 and SSE4 for early study?
von kalven » Do, 19/06/2008 - 19:01
Do, 19/06/2008 - 19:01 5
von srimks
Do, 19/06/2008 - 19:01
Normales Thema Where can I find comparison between SSE3 and SSE4 instruction set??
von nasayoo » Di, 24/06/2008 - 05:48
Di, 24/06/2008 - 05:48 3
von TimP (Intel)
Di, 24/06/2008 - 08:21
Normales Thema Is there any methods to see contents in MMX and XMM registers?
von kalven » Mo, 30/06/2008 - 01:43
Mo, 30/06/2008 - 01:43 3
von srimks
Mo, 30/06/2008 - 01:43
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