sumA, sumB, etc are __m128, the array is 16byte aligned array of floats

So inside the loop I do this for every sum variable:
sumA = _mm_add_ps(sumA, _mm_load_ps(&elements[i]));

And I sum the temp sums after the loop finishes

Hi,

Jim, I am aware of the fact that this is an AVX forum; however, I have not found a one that is more suitable. Please, let me know if there is one. The compiler has all optimizations enabled.

Tim, I appologize if it is not clear what I am trying to achieve. I am just trying to understand, why I don't experience any speedup if I unroll the loop and use more temporary variables. Furthermore, I am adding 4 elements to each sum, since it doesnt seem to be very clear, I am including the code.

__m128 Sums[4];

for(unsigned int i=0;i<4;i++) { Sums[i] = _mm_set_ps(0.f, 0.f, 0.f, 0.f); }

for(unsigned int i=0;i Sums[0] = _mm_add_ps(Sums[0], _mm_load_ps(&pBuffer[i]));
Sums[1] = _mm_add_ps(Sums[1], _mm_load_ps(&pBuffer[i+4]));
Sums[2] = _mm_add_ps(Sums[2], _mm_load_ps(&pBuffer[i+8]));
Sums[3] = _mm_add_ps(Sums[3], _mm_load_ps(&pBuffer[i+12]));
}

Sums[0] = _mm_add_ps(Sums[0], Sums[2]);
Sums[1] = _mm_add_ps(Sums[1], Sums[3]);
Sums[0] = _mm_add_ps(Sums[0], Sums[1]);

float Sum = 0.f;
for(unsigned int j=0;j<4;j++){
Sum += Sums[0].m128_f32[j];
}

And the loop complies into this:

000D1A70 addps xmm3,xmmword ptr [eax-20h]
000D1A74 addps xmm2,xmmword ptr [eax-10h]
000D1A78 addps xmm1,xmmword ptr [eax]
000D1A7B addps xmm0,xmmword ptr [eax+10h]
000D1A7F add eax,40h
000D1A82 dec ecx
000D1A83 jne 000D1A70

Which is what I would expect, soI did not try to compile it with the Intel compiler. So if I compare this unrolled versionto the one with one sum variable I can indeed see the dependency path is shorter(As I mentioned before, they are +- same, but the unrolled version sums four vectors in oneinteration of the loop). This corresponds with Intel's presentation and recommendationsabout instruction level parallelism. (eg GDC 2011)However, despite this fact, it is not faster (itis slightly slower). And I would expect that to be faster since the load should take about 5 cycles and the latency of ADDPS is 3 cycles and these dependencies should be partly avoided in the unrolled version. Finally, there is not any speedup even with only 2 parallel sums.

bronxzv, thank you very much for your post. I am aware of the macrofusion thingy, but unfortunately I have had problems in these cases to make VS generate the code I want. When I change the comparision operator of the loop, it generates cmpjne, but it also adds a lea/add. And since I can't write asm code directly with VS x64, I just have to live with that.

The array is filled withrandom <0,1> floats.

Thank you for the question about the array size! I should have realized that and tested it with various sizes. When the data set is small enough to fit into l1 dcache it really runsabout2 times faster than the unrolled version. When the array fits into l2, it is about 20-25% faster than the unrolled version. When the array does not fit into l2 (my cpu doesn't have l3 cache) it runs about the same.

Thank you very much for your help. I am just wondering - should I not be able to gain the speedup even when the array is bigger than the cache size? Since I prefetch the data (I use prefetchnta, +- 400 cycles ahead). Why doesthe speed dependon the size of the array? Is it some overhead for managing data in the caches ?

Chris, I apologize for that. You are obviously right, I was experimenting with only two temp variables and forgot to change backthe loop step. I realized that when I was pating the code, but forgot to change the asm too. Thanks for pointing it out, I editted that post.

Tim, I am not sure I understand that (or I dont understand what you are trying to say). I cannot see the difference between the small data set and the large one. The data is not in cache in neither of the cases and it has to get there. So ifI prefetch by software/hardware prefetch it should be there. The only difference I can see is that if the data set is large, some data must be evicted from the cache. However, since the data is not modified it should not be copied back or anything like that (as far as I know). Thus I believe the speedup should be same in both cases. Now when I know it is cache related, I will run it through a profiler and see what it says.

I do indeed run multiple iterations of the tests to get some reasonable timings. I flush caches after each iteration ofa test and after I init the data. Thanks for that hint about SpeedStep. I have not realized thatit was screwing up the results a bit. So when the data set is small, I can see about 20% speedup that decreses with the incresing size of the data set. However, Ican now understand it after you pointed out it is moreless a bandwidth test. So when the data set is small the bus can deal with the memory transfer requests, but when the size increases it cannot deliver the data fast enough and it is limitingtheperformance. Thank you and everyone else for having the patience and explaining it to me.