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Download Performance tuning of OpenCL* applications on Intel® Xeon Phi™ coprocessor using Intel® VTune™ Amplifier XE 2013 [PDF 603KB]
performance optimization
Optimize Financial Applications using Intel® Math Kernel Library
Intel® Math Kernel Library (Intel® MKL) contains a wealth of highly optimized math functions that are fundamental to a wide variety of Financial Applications. Intel MKL uses Industry Standard interfaces and can be easily integrated into your current application framework. The Webinar provides an overview of Intel MKL to accelerate financial applications. Topics include:
Sid Meier’s Civilization* V Finds the Graphics Sweet Spot
Sid Meier’s Civilization* series has a successful 20-year history. This white paper describes how Firaxis utilized Intel® GPA to ensure Civilization V (Civ5) offers the best possible mix of graphics & game performance for the vast majority of systems.
Using Windows registry hooks to invoke Intel® VTune™ Amplifier XE to profile Windows services
The article describes how to profile Windows* services by launching them from Intel® VTune™ Amplifier. This trick is useful for cases when attaching to process is not applicable.
MEM_TRANS_RETIRED.LOAD_LATENCY events
There are 8 MEM_TRANS_RETIRED.LOAD_LATENCY_GT_* precise events available on Intel® Microarchitecture Codename Sandy Bridge. The events allow you to pinpoint loads that exceeded a given latency, measured in CPU clock cycles. For example, the MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4 event is for loads exceeding 4 clocks in latency, and the MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512 event is for loads longer than 512 clocks.
Optimize Code for the Most-Often Used Code Path
Challenge
Overcome the limitation of optimizing compilers in terms of not knowing which code-execution path is most likely to be used. For example, an optimizer can refine a long series of if statements and have it run at great speed; but if it does not know that in the majority of runs, the very last test is the one that is run, the optimizer cannot rearrange the sequence for best possible performance. It has to work on the assumption that all if tests in the sequence are equally probable.
Profiling Windows Services
Steps to profile Windows* services by Intel® VTune™ Amplifier XE
Create Cache-Data Blocks
Challenge
Take advantage of data-cache locality with cache-data blocking. Loops with frequent iterations over large data arrays should be restructured such that the large array is subdivided into smaller blocks, or tiles. Each data element in the array is therefore reused within the data block, so that the block of data fits within the data cache, before operating on the next block or tile.
The Serial On-Ramp to the Multicore Highway: Preparing to Parallelize Code
This article discusses how coding and optimization on-the-fly are opposed and how performance experts approach performance improvement. It explains how they systematically prepare their code for optimization and how the optimization process is done.
Align and Organize Data for Better Performance
Challenge
Minimize performance losses due to unaligned data. Unaligned data can be a potentially serious performance problem. It is important to remember to focus on data elements in the most CPU-intensive parts of your program.
Solution
Align data on natural operand size address boundaries. If the data will be accessed with vector instruction loads and stores, align the data on 16-byte boundaries. For best performance, align data as follows:
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