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Intel® Math Kernel Library on the Intel® Xeon Phi™ Coprocessor
Starting with Intel® MKL 11.0, support for the Intel® Xeon Phi™ coprocessor has been available. Intel® MKL provides specifically optimized functions for users to take advantages of this new architecture. This page is a collection of online resources on using Intel® MKL on the Intel® Xeon Phi™ coprocessors.
Common Vectorization Tips
Handling user-defined function-calls inside vector-loops
If you want to vectorize a loop that has a user-defined function call, (possibly re-factor the code and) make the function-call a vector-elemental function.How to Achieve Peak Transfer Rate
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Selective Use of gatherhint/scatterhint Instructions
Compiler Methodology for Intel® MIC Architecture
Selective Use of gatherhint/scatterhint Instructions
Overview
This note documents a known hardware issue with early alpha hardware of the Intel® Xeon® Phi™ coprocessor (A0 stepping from 2011) and an undocumented option to work around it.
Scheduling for 1-4 Threads Per Core Using Compiler Option -opt-threads-per-core
Compiler Methodology for Intel® MIC Architecture
Scheduling for 1-4 Threads Per Core Using Compiler Option
This documents a compiler option that affects the number of hardware threads per core that will be used by an application.
-mCG_lrb_num_threads=1|2|3|4 (default is 2) ( Composer XE 2013 initial release, version 13.0.0.079. undocumented/unsupported option )
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