| Last Modified On : | May 6, 2008 8:48 PM PDT |
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A relatively small memory device close to a processor that mirrors the contents of, and is considerably faster than, the computer's main memory. Cache hierarchies consisting of one or more levels of cache are essential for many algorithms in modern computer systems. Since processors are so much faster than the computer's main memory, a processor can run at a significant fraction of full speed only if the data can be loaded into cache before they are needed, and those data can be reused during a calculation.
Data are moved between the cache and the computer's main memory in small blocks of bytes called cache lines. An entire cache line is copied when any byte within the memory mapped to the cache line is accessed. Cache lines are invalidated from the cache when the cache becomes full and space is needed for other data, or when memory represented by the cache line is written by some other processing element (PE) or engine/controller..
In a processor containing multiple cores, each core has its own cache. In many cases, multiple cores share an additional level or two of cache. Keeping the caches coherent (i.e., ensuring that all processors have the same view of memory through their distinct caches) is an issue that must be dealt with by computer architects and compiler writers. Programmers must be aware of caching issues when optimizing the performance of software.
Data are moved between the cache and the computer's main memory in small blocks of bytes called cache lines. An entire cache line is copied when any byte within the memory mapped to the cache line is accessed. Cache lines are invalidated from the cache when the cache becomes full and space is needed for other data, or when memory represented by the cache line is written by some other processing element (PE) or engine/controller..
In a processor containing multiple cores, each core has its own cache. In many cases, multiple cores share an additional level or two of cache. Keeping the caches coherent (i.e., ensuring that all processors have the same view of memory through their distinct caches) is an issue that must be dealt with by computer architects and compiler writers. Programmers must be aware of caching issues when optimizing the performance of software.
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