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Last Modified On :   October 27, 2008 12:36 PM PDT
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"2008 Asia Academic Forum - Taipei, Taiwan"

To get to the download section, please click the title above.

The following presentations and information material will be available:

  • Software Transactual Memory; pdf 1.0 MB
  • Survey Language Models; pdf 0.4 MB
  • Threading Building Blocks; pdf 1.1 MB
  • Open MP; pdf 1.4 MB
  • Intel Academic Community Program; ppt 3.2 MB
  • Concurrency in Computer Architectures; pdf 2.8 MB
  • Casestudies from the AAF (Multicore Academic Curriculum Development White Papers);

It is required to be a member of the Multicore Curriculum Initiative, to get access to the download section.

I am not a member and want to sign up for membership MORE>>

 

"APAC Academic Event presentations - Intel Roadmap to Academic Excellence"

To download presentations please click the title:

 

ITiCSE 2008 Madrid, Spain; Wednesday, July 2nd; Main Auditorium

Confronting Manycore: Parallel Programming beyond Multicore
Speaker: Dr. Michael Wrinn, Intel ; Video 29 min

Abstract:

Computer processor manufacturers have switched from single core to multicore designs, creating the opportunity for software to make the corresponding switch, from serial to parallel. Initial multicore chips have been straightforward: symmetric, typically with 2 or 4 cores. To address the programming skills needed, Intel in 2006 began to work with university faculty on course material and tools for use in teaching parallel programming. However, indicators point to a near future of much larger numbers of cores, with the likelihood of specialized cores, complex cache management, and sophisticated communication requirements. Today's multicore software techniques -- primarily threading -- may not be sufficient to utilize these manycore systems efficiently. This talk will review the efforts so far, and explore possible approaches to the new manycore challenge.

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See the Powerpoint slides>> (you might want to download the slides and than watch the video)

 

SIG CSE Portland, Oregon; Friday, March 14; 4:00pm-5:15pm; Room B112

Intel: Pacifying the Pandora's Box of Parallelism: Intel's Curriculum Program for Multi-Core and Multithreaded Programming
Speaker: Bev Bachmayer, Intel ; ppt 7 MB

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SIG CSE Portland, Oregon; Friday, March 14; 10:00am-11:15am;

Intel: Confronting Manycore: Parallel Programming beyond SMP (multicore is just the beginning...)
Speaker: Dr. Michael Wrinn, Intel ; ppt 3.67MB

Abstract:
Computer processor manufacturers have switched from single core to multicore designs, creating the opportunity (need?) for software to make the corresponding switch, from serial to parallel. The initial multicore chips are straightforward: symmetric, typically with 2 or 4 cores. However, indicators point to a near future of much larger numbers of cores, with the likelihood of specialized cores, complex cache management, and sophisticated communication requirements. Today's multicore software techniques -- primarily threading -- may not be sufficient to utilize these manycore systems efficiently. This talk will explore possible approaches to the challenge.

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