Intel Software Network articles Feed http://software.intel.com/en-us/articles/dpd-general/type/technical-notes/ en-us Intel Cluster Checker 1.8 Execution Time This article shows reference times for a full execution on different node counts, similar to the one required for Intel Cluster Ready architecture compliance. It is expected that a simple interpolation of the provided values will help to roughly estimate execution time during troubleshooting.

The executed command line is shown below; it uses an almost empty configuration file, only having the node list file location. This configuration selects default values for all checks. MPI-related tests and benchmarks are executed over the best available messaging fabric.

$ cluster-check config.xml --certification

On a reference system the wall time was:

64 nodes: 2097 seconds (about 0.58 hours)
128 nodes: 2825 seconds (about 0.78 hours)
256 nodes: 5655 seconds (about 1.57 hours)
320 nodes: 6915 seconds (about 1.92 hours)

walltime.png

This complete check covers different tests: hardware and software uniformity, health and functional wellness behavior, individual node and cluster wide performance, etc. Check the product documentation to find out how to run a different set of test modules; in order to have a lighter or deeper coverage with a reduced or increased execution time, respectively.

If your system has hundred of nodes check this article for more details.
The details of the system used to gather reference data can be found here.

Disclaimer: Results have been estimated based on internal Intel analysis and are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance.

]]> http://software.intel.com/en-us/articles/intel-cluster-checker-18-execution-time/ Sat, 08 Oct 2011 20:00:00 -0700 http://software.intel.com/en-us/articles/intel-cluster-checker-18-execution-time/#comments http://software.intel.com/en-us/articles/intel-cluster-checker-18-execution-time/ Software Products General Tools Intel Software Network communities Intel® Cluster Checker Knowledge Base Intel® Cluster Ready Knowledge Base Intel Architecture and Processor Identification With CPUID Model and Family Numbers This article is intended to aid software developers in understanding the "big picture" of Intel®'s recent architecture and processor releases. The "tick tock" model adds predictability to Intel®'s architecture roadmap. However within each "tick" and "tock" architecture, multiple processors are launched to support the many diverse computing needs of consumers. While the general Instruction Set Architecture (ISA) and feature set within a given architecture are identical, certain model specific variations occur, and are generally enumerated through CPUID interrogation[1]. The CPUID model number is a convenient way of anticipating the model specific functionality that is available at runtime and subsequently designing the architecture specific parts of software (nevertheless, at runtime, the feature bits in the CPUID should always be verified before use).

The information in the table below is composed from the "Intel® Processor Identification and the CPUID Instruction" and the official Intel® product information source.

For identifying a particular processor, please use the Intel® Processor Identification Utility for Microsoft® WindowsTM operating systems or the bootable version for other operating systems[2].

 

Notes

  • The -EP suffix denotes a Dual Processor, meaning this processor is designed to operate in a Dual Processor platform (but can still operate in a Single Processor platform). The -EX suffix denotes a Multi-Processor (MP), meaning this processor is designed to operate in a Multiprocessor platform, but can still operate in a Single or Dual processor platform configuration.
  • The Family number is an 8-bit number derived from the processor signature by adding the Extended Family number (bits 27:20) and the Family number (bits 11:8). See section 5.1.2.2 of the "Intel Processor Identification and the CPUID Instruction".
  • The Model number is an 8 bit number derived from the processor signature by shifting the Extended Model number (bits 19:16) 4 bits to the left and adding the Model number (bits 7:4) . See section 5.1.2.2 of the "Intel Processor Identification and the CPUID Instruction".

 

Mainline Architectures and Processors

This table includes the mainline processors on 90nm and later process technology. Please read and understand these important disclaimers prior to use.

Process
Technology

Microarchitecture
Codename

Processor
Codename

Processor Signature

Family Number

Model Number

Intel® Brand
Name(s)

Intel® Brand
Processor Number

32 nm

SandyBridge

Sandy Bridge

0x206Ax

0x06

0x2A

Core™ i3
Core™ i5
Core™ i7
Celeron™ Desktop
Celeron™ Mobile
Pentium™ Desktop
Pentium™ Mobile
Xeon™ E3

i3-21xx/23xx-T/M/E/UE
i5-24xx/25xx-T/S/M/K
i7-2xxx-S/K/M/QM/LE/UE/QE
G4xx, G5xx
8xx, B8xx
350, G6xx, G6xxT, G8xx
9xx, B9xx
E3-12xx

Westmere

Arrandale

0x2065x

0x25

Celeron™ Mobile
Pentium™ Mobile
Core™ i3
Core™ i5
Core™ i7

P4xxx, U3xxx
P6xxx, U5xxx
i3-3xxE, i3-3xxM, i3-3xxUM
i5-4xxM/UM, i5-5xxE/M/UM
i7-6xxE/LE/UE/M/LM/UM

Clarksdale

Pentium™ Desktop
Core™ i3
Core™ i5
Xeon™ 3000

G69xx
i3-5xx
i5-6xx, i5-6xxK
L34xx

Gulftown

0x206Cx

0x2C

Core™ i7
Core™ i7 Extreme
Xeon™ 3000

i7-9xx
i7-9xxX
W36xx

Westmere-EP

Xeon™ 3000
Xeon™ 5000

W36xx
L56xx, E56xx, X56xx

Westmere-EX

0x206Fx

0x2F

Xeon™ E7

E7-2xxx, E7-48xx, E7-88xx

45 nm

Nehalem

Clarksfield

0x106Ex

0x1E

Core™ i7
Core™ i7 Extreme

i7-7xxQM, i7-8xxQM
i7-9xxXM

Lynnfield

Core™ i5
Core™ i7
Xeon™ 3000

i5-7xx, i5-7xxS
i7-8xx, i7-8xxS, i7-8xxK
X34xx

Jasper Forest

Xeon™ 5000
Celeron™ Desktop

LC55xx, EC55xx
P10xx

Bloomfield

0x106Ax

0x1A

Core™ i7 Extreme
Core™ i7
Xeon™ 3000

i7-965/975
i7-9x0
W35xx

Nehalem-EP

Xeon™ 5000

L55xx, E55xx, X55xx, W55xx

Nehalem-EX

0x206Ex

0x2E

Xeon™ 7000
Xeon™ 6000

L75xx, E75xx, X75xx
E65xx, X65xx

Penryn

Yorkfield

0x1067x

0x17

Core™ 2 Quad
Core™ 2 Extreme
Xeon™ 3000

Q9xxx, Q8xxx, !9xxxS
QX9xxx
L33xx, X3350

Wolfdale

Celeron™ Desktop
Core™ 2 Duo
Pentium™
Xeon™ 5000/3000

E3xxx
E7xxx, E8xxx
E5xxx, E6xxx, E6xxxK
L52xx, E31xx

Penryn

Core™ 2 Duo Mobile
Celeron™ M

P7xxx, P9xxx, SL9xxx
722

Harpertown (DP)

Xeon™ 5000

L54xx, E54xx, X54xx

Dunnington (MP)

0x106Dx

0x1D

Xeon™ 7000

L74xx, E74xx, Q7xx

65 nm

Merom

Clovertown

0x006Fx

0x0F

Xeon™ 5000

E53xx, L53xx, X53xx

Kentsfield

Xeon™ 3000
Core™ 2 Quad
Core™ 2 Extreme

X32xx
Q6600
QX6xxx

Conroe

Xeon™ 3000
Pentium™
Core™ 2 Duo
Core™ 2 Extreme
Celeron™ Desktop

30xx
E21xx
E43xx,E6xxx
X6800
E1600

Merom

Core™ 2 Duo M
Pentium™ Mobile
Core™ 2 Extreme M

L7xxx,T5xxx,T7xxx,U7xxx
T3200
X7xxx

Woodcrest

Xeon™ 5000

51xx

Merom
Conroe

0x1066x

0x16

Celeron™ Desktop
Celeron™ Mobile

4xx
5xx

Presler

Cedar Mill

0x0066x

0x0F

0x06

Pentium™ 4

3xx, 6xx

Presler

Pentium™ D

9xx

90 nm

Prescott

Nocona
Irwindale

0x0063x
0x0064x

0x03/
0x04

Xeon™

Prescott

Celeron™ D
Pentium™ 4

3xx
5xx

Dothan

Dothan

0x006Dx

0x06

0x0D

Celeron™ M
Pentium™ Mobile

3xx
7xx

 

 

Atom™ Architectures and Processors

This table includes the Atom™ processors on 45nm and later process technology. Please read and understand these important disclaimers prior to use.

Process
Technology

Architecture Codename

Processor Codename

Platform
Codename

Processor
Signature

Family
Number

Model
Number

Intel® Brand
Name(s)

Intel® Brand
Model Number

32 nm

Atom™

Cedarview

Cedar Trail

0x0366x

0x06

0x36

Atom™

N2000 series: N26xx, N28xx
D2000 Series: D25xx (no HT), D27xx

45 nm

Lincroft

Oak Trail

0x0266x

0x26

Z6xx (single core)

Pineview

Pine Trail

0x016Cx

0x1C

N4xx, D4xx (single core)
N5xx, D5xx (dual core)

Silverthorne

any

Z5xx

 

Disclaimers

Information in this article is intended as a convenient summary of the contents of the "Intel® Processor Identification and the CPUID Instruction" application note and the official Intel® product information source.

In case of discrepancy, the information in the original application note and product information source supersede the contents of this article. (Please notify the author of any such discrepancy).

Please consult Section 2: Usage Guidelines of the "Intel® Processor Identification and the CPUID Instruction" for the proper use of CPUID.

Intel® processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See http://www.intel.com/products/processor_number for details.


All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

 


 

[1] For an example of interrogating CPUID to verify features please read Using CPUID to Detect the presence of SSE 4.1 and SSE 4.2 Instruction Sets

[2] In Linux based operating systems you can type ‘cat /proc/cpuinfo' to obtain the processor family and model numbers (note they are formatted in decimal, while the tables in this article containhexadecimal formatting of these numbers).

 ]]> http://software.intel.com/en-us/articles/intel-processor-identification-with-cpuid-model-and-family-numbers/ Tue, 04 Oct 2011 00:00:00 -0700 http://software.intel.com/en-us/articles/intel-processor-identification-with-cpuid-model-and-family-numbers/#comments http://software.intel.com/en-us/articles/intel-processor-identification-with-cpuid-model-and-family-numbers/ Software Products General Tools Resources For Software Developers Intel® Parallel Studio XE 2011 Release Notes This page provides the current Installation Guide and Release Notes for the Intel® Parallel Studio XE 2011 products. All files are in PDF format - Adobe Reader* (or compatible) required.  The Intel® Parallel Studio XE 2011 Release Notes are a superset of the Intel® C++ Studio XE 2011 and Intel® Fortran Studio XE Release Notes.

To get product updates, log in to the Intel® Software Development Products Registration Center.

For questions or technical support, visit Intel® Software Developer Support

 

Service Pack 1 (SP1) Update 1 - October 2011
Intel® Parallel Studio XE 2011 for Linux*

Intel® Parallel Studio XE 2011 for Windows*

Service Pack 1 (SP1) - September 2011
Intel® Parallel Studio XE 2011 for Linux*

Intel® Parallel Studio XE 2011 for Windows*

Update 2 - May 2011
Intel® Parallel Studio XE 2011 for Linux*

Intel® Parallel Studio XE 2011 for Windows*

Update 1 - February 2011
Intel® Parallel Studio XE 2011 for Linux*

Intel® Parallel Studio XE 2011 for Windows*

Initial Product Release - November 2010
Intel® Parallel Studio XE 2011 for Linux*

Intel® Parallel Studio XE 2011 for Windows*

]]> http://software.intel.com/en-us/articles/intel-parallel-studio-xe-2011-release-notes/ Sat, 03 Sep 2011 21:00:00 -0700 http://software.intel.com/en-us/articles/intel-parallel-studio-xe-2011-release-notes/#comments http://software.intel.com/en-us/articles/intel-parallel-studio-xe-2011-release-notes/ Software Products General Intel® Integrated Performance Primitives Documentation
Intel® Integrated Performance Primitives – Documentation

Documentation
]]> http://software.intel.com/en-us/articles/intel-integrated-performance-primitives-documentation/ Sun, 21 Feb 2010 00:00:00 -0800 http://software.intel.com/en-us/articles/intel-integrated-performance-primitives-documentation/#comments http://software.intel.com/en-us/articles/intel-integrated-performance-primitives-documentation/ Software Products General Intel® Integrated Performance Primitives Knowledge Base Use of Intel® MKL in HPCC benchmark HPCC Application Note

Step 1 - Overview

This guide is intended to help current HPCC users get better benchmark performance by utilizing Intel® Math Kernel Library (Intel® MKL).

HPCC stands for High Performance Computing Challenge benchmark and is actually a suite of benchmarks that measure performance of the CPU, memory subsystem and interconnect. It consists of 7 benchmark tests - HPL (High Performance LINPACK), DGEMM (Double-precision GEneral Matrix-Matrix multiply), STREAM, PTRANS (Parallel TRANSpose, Random Access, FFT (Fast Fourier Tranform and communication bandwidth/latency.

Please find more information on HPCC from: http://icl.cs.utk.edu/hpcc/* .

Version Information

This application note was created to help users who benchmark clusters using HPCC to make use of the latest versions of Intel MKL on Linux platforms on Xeon systems.  Please note that previous versions of MKL may require other steps to successfully compile and link with HPCC.

Step 2 - Downloading HPCC Source Code

The HPCC source code can be downloaded from: http://icl.cs.utk.edu/hpcc/software/index.html*.

Prerequisites

1.     Intel MKL contains highly optimized FFT and also the wrappers for FFTW, which can be obtained from the following options:

•  Download a FREE evaluation version of the Intel MKL product.

•  Download the FREE non-commercial* version of the Intel MKL product.

All of these can be obtained at: Intel® Math Kernel Library product web page.

Intel® MKL is also bundled with the following products


2.     Intel MPI can be obtained from Intel® Cluster Tools. Open source MPI (MPICH2) can be obtained from http://www.mcs.anl.gov/research/projects/mpich2/*.

Step 3 - Configuration

Use the following commands to extract the HPCC tar files from the downloaded hpcc-x.x.x.tar.gz. 

$gunzip hpcc-x.x.x.tar.gz
$tar -xvf hpcc-x.x.x.tar

The above will create a directory named hpcc-x.x.x

Make sure that MPI, C++ and FORTRAN compilers are installed and they are in PATH. Also set LD_LIBRARY_PATH to your compiler (C++ and FORTRAN), MPI, and MKL libraries.

Step 4 - Building HPCC

•  Build MPI MKL FFTW library.

Change the directory to <your MKL installation>/interfaces/fftw2x_cdft.

From the fftw2x_cdft directory, run the following command:

$make libintel64 PRECISION=MKL_DOUBLE interface=ilp64

Here we are building for Intel64 architecture with Intel MPI (default for Makefile, you may use a different mpi), with Intel compilers, DOUBLE precision and ilp64 interface. This will create the MKL MPI FFTW interface library libfftw2x_cdft_DOUBLE_ilp64.a in lib/intel64 directory.

Note: Please note that by setting the interface parameter to ilp64 we require to build the FFTW MPI wrappers which admit 64-bit parameters in their interface to match the calls from HPCC.  These 64-bit aware wrappers are not to be used with usual applications complying with traditional FFTW interfaces.  Please execute $make to see the full set of options.

•  Build FFTW C wrapper library

Change the directory to <your MKL installation>/interfaces/fftw2xc.

Then build the FFTWC wrapper by running the command as below

$make libintel64 PRECISION=MKL_DOUBLE

This will create libfftw2xc_intel.a library in <your mkl installation>/lib/intel64 directory

•  Build HPCC

Change directory to hpcc-x.x.x/hpl

Create a Makefile from the existing one, for e.g. Make.intel. You can reuse one from the hpl/setup directory.

Edit Make.intel as follows: modify the LAdir, LAlib lines as below to point to MKL libraries. 
LAdir = /opt/intel/mkl/lib/intel64

LAlib = -Wl,--start-group $(LAdir)/libfftw2x_cdft_DOUBLE_lp64.a $(LAdir)/libfftw2xc_intel.a $(LAdir)/libmkl_intel_lp64.a $(LAdir)/libmkl_intel_thread.a $(LAdir)/libmkl_core.a $(LAdir)/libmkl_blacs_intelmpi_lp64.a  $(LAdir)/libmkl_cdft_core.a -Wl, --end-group -lpthread -lm

Please make sure to following compiler options on the compile line:

-DUSING_FFTW -DMKL_INT=long -DLONG_IS_64BITS

Build HPCC by using

$make all arch=intel

This will create an executable with name hpcc in the hpcc-x.x.x directory and a file _hpccinf.txt which is a template input file for hpcc. Rename the file to hpccinf.txt.

Step 5 - Running HPCC

Modify the configuration parameters in hpccinf.txt file.

Run hpcc by executing the following command.

$mpirun -np 4 hpcc

hpccinf.txt is the same as standard hpl input file with a few additional lines. Please refer our HPL application note on tuning parameters in the configuration file.

Appendix A - Performance Results

Below are the hpcc benchmark results of Intel Endeavor cluster which can also be found in hpcc website*.

HPC Challenge Benchmark Record

System Information
Affiliation:

Intel Corporation



URL:

http://www.intel.com/

Location:

USA, Washington, DuPont



System Use:

Vendor

System Manufacturer:

Intel



System Name:

Intel Endeavor cluster

Interconnect Manufacturer:

Mellanox



Interconnect Type:

QDR Infiniband (40 Mellanox MTS3600Q-1UNC switches, Mellanox MHGH28-XTC adapters on nodes, only one port used per adpater, slot type is PCIe x8 Gen2)
Operating System:

Red Hat EL 5.4, kernel 2.6.18-164



MPI:

Intel MPI 4.0

MPI Wtick:

0.000001



BLAS:

Intel MKL 10.3

Language:

C



Compiler:

Intel C/C++ Compiler 11.1.064

Compiler Flags:

-O2 -xSSE4.2 -ip -ansi-alias -fno-alias -DUSING_FFTW -DMKL_INT=long -DLONG_IS_64BITS -DRA_SANDIA_OPT2 -DHPCC_FFT_235 (and "-opt-streaming-stores always" for stream.c)

Processor Type:

Xeon X5670 (SMT OFF, Turbo OFF, DDR3-1333)

Processor Speed:

2.93 GHz



Total Processors:

4320

Processors Entered:

4320



Processors determined:

4320

Cores per chip:

6



HPL Processes:

4320

MPI Processes:

4320



Threads Entered:

1

Threads determined:

1



FLOPs per cycle:


Theoretical peak:

50.6304 TFlop/s

Total memory:

8640 GiB
FFT library:

Intel MKL 10.3







HPL
HPL:

43.722 Tflop/s



HPL time:

14002.6

HPL eps:

2.22045e-16



HPL Rnorm1:

0.000000140367

HPL Anorm1:

243723



HPL AnormI:

243671

HPL Xnorm1:

1011140



HPL XnormI:

6.36053

HPL N:

972000



HPL NB:

168

HPL NProw:

60



HPL NPcol:

72

HPL depth:

0



HPL NBdiv:

2

HPL NBmin:

4



HPL CPfact:

R

HPL CRfact:

C



HPL CPtop:

1

HPL order:

R




HPL dMach EPS:

2.220446e-16



HPL sMach EPS:

0.0000001192093

HPL dMach sfMin:

2.2250739999999997e-308



HPL sMach sfMin:

1.1754939999999999e-38

HPL dMach Base:

2



HPL sMach Base:

2

HPL dMach Prec:

4.440892e-16



HPL sMach Prec:

0.0000002384186

HPL dMach mLen:

53



HPL sMach mLen:

24

HPL dMach Rnd:

0



HPL sMach Rnd:

0

HPL dMach eMin:

-1021



HPL sMach eMin:

-125

HPL dMach rMin:

2.2250739999999997e-308



HPL sMach rMin:

1.1754939999999999e-38

HPL dMach eMax:

1025



HPL sMach eMax:

129

HPL dMach rMax:

0



HPL sMach rMax:

0

dweps:

1.110223e-16



sweps:

0.00000005960464



PTRANS
PTRANS:

549.988 GB/s



PTRANS time:

3.43075 seconds

PTRANS residual:

0



PTRANS N:

486000

PTRANS NB:

232



PTRANS NProw:

60

PTRANS NPcol:

72






STREAM
S-STREAM Copy:

8.30307 GB/s



S-STREAM Scale:

8.2778 GB/s

S-STREAM Add:

11.0563 GB/s



S-STREAM Triad:

11.0009 GB/s

EP-STREAM Copy:

3.33023 GB/s



EP-STREAM Scale:

3.32376 GB/s

EP-STREAM Add:

3.48553 GB/s



EP-STREAM Triad:

3.5357 GB/s

STREAM Vector Size:

72900000



STREAM Threads:

1



RandomAccess
S-RandomAccess:

0.035379 Gup/s



EP-RandomAccess:

0.0166186 Gup/s

G-RandomAccess:

10.8309 Gup/s



G-RandomAccess N:

549755813888

G-RandomAccess time:

203.033 seconds



G-RandomAccess Check Time:

187.382 seconds

G-RandomAccess Errors:

1343419



G-RandomAccess Errors Fraction:

0.00000244366

G-RandomAccess TimeBound:

-1



G-RandomAccess ExeUpdates:

2199023255552

RandomAccess N:

134217728






FFT
S-FFT:

2.3047 GFlop/s



EP-FFT:

1.14392 GFlop/s

MPIFFT:

1173.89 GFlop/s



MPIFFT N:

116640000000

MPIFFT Max Error:

0.00000000000000431742



MPIFFT time0:

0 seconds

MPIFFT time1:

0 seconds



MPIFFT time2:

0 seconds

MPIFFT time3:

0 seconds



MPIFFT time4:

0 seconds

MPIFFT time5:

0 seconds



MPIFFT time6:

0 seconds

FFTEnblk:

16



FFTEnp:

8

FFTEl2size:

1048576






DGEMM
S-DGEMM:

11.0582 GFlop/s



EP-DGEMM:

10.9366 GFlop/s

DGEMM N:

8537






RandomRing Latency/Bandwidth
RandomRing Latency:

6.43059 usec



RandomRing Bandwidth:

0.131166 GB/s



NaturalRing Latency/Bandwidth
NaturalRing Latency:

3.44515 usec



NaturalRing Bandwidth:

0.962355 GB/s



PingPong Latency/Bandwidth
Maximum PingPong Latency:

4.36604 usec



Maximum PingPong Bandwidth:

4.02814 GB/s

Minimum PingPong Latency:

0.238419 usec



Minimum PingPong Bandwidth:

1.48091 GB/s

Average PingPong Latency:

3.62335 usec



Average PingPong Bandwidth:

1.80222 GB/s


Size of Data Types
char:

1 byte  



short:

2 bytes

int:

4 bytes



long:

8 bytes

void ptr:

8 bytes



float:

4 bytes

double:

8 bytes



size t:

8 bytes

s64Int:

8 bytes



u64Int:

8 bytes



OpenMP
M OpenMP:

-1



OpenMP Num Threads:

0

OpenMP Num Procs:

0



OpenMP Max Threads:

0



Memory
MemProc:

-1



MemSpec:

-1

MemVal:

-1






CPS
CPS_HPCC_FFT_235:

1



CPS_HPCC_FFTW_ESTIMATE:

0

CPS_HPCC_MEMALLCTR:

0



CPS_HPL_USE_GETPROCESSTIMES:

0

CPS_RA_SANDIA_NOPT:

0



CPS_RA_SANDIA_OPT2:

1



Version: 1.4.1.b - Run Type: base
Created: 2010-11-01 - Exported: Thu Mar 17 06:32:04 2011

Appendix C - References

• Intel Xeon Processor based Servers Homepage



]]> http://software.intel.com/en-us/articles/performance-tools-for-software-developers-use-of-intel-mkl-in-hpcc-benchmark/ Thu, 04 Feb 2010 11:30:00 -0800 http://software.intel.com/en-us/articles/performance-tools-for-software-developers-use-of-intel-mkl-in-hpcc-benchmark/#comments http://software.intel.com/en-us/articles/performance-tools-for-software-developers-use-of-intel-mkl-in-hpcc-benchmark/ Software Products General Intel® C++ Compiler for Linux* Knowledge Base Intel® C++ Compiler for Mac OS X* Knowledge Base Intel® C++ Compiler for Windows* Knowledge Base Intel® Cluster Toolkit for Linux* Knowledge Base Intel® Cluster Toolkit for Windows* Knowledge Base Intel® Fortran Compiler for Linux* Knowledge Base Intel® Fortran Compiler for Mac OS X* Knowledge Base Intel® Math Kernel Library Knowledge Base Intel® Parallel Studio Release Notes This page provides the current Installation Guide and Release Notes for the Intel® Parallel Studio product. All files are in PDF format - Adobe Reader* (or compatible) required.

To download product updates, log in to the Intel® Software Development Products Registration Center.

For questions or technical support, visit Intel® Software Developer Support


Service Pack 1, November 2009

The Release Notes for the individual components are also available:

]]> http://software.intel.com/en-us/articles/intel-parallel-studio-release-notes/ Wed, 09 Dec 2009 21:00:00 -0800 http://software.intel.com/en-us/articles/intel-parallel-studio-release-notes/#comments http://software.intel.com/en-us/articles/intel-parallel-studio-release-notes/ Software Products General Intel® Parallel Studio Home How to find Host ID for Floating licenses
Identifying the Host Name and Host ID
The host name and host ID are system-level identifiers on supported platforms that are used in the license file to identify the node on which you plan to install the Intel License Manager for FLEXlm* and license file. To enable you to obtain a counted license, these unique values must be available when you register your product. For node-locked licenses, you will also need the host name and host id of the node from which your applications will run, if different from the node for the Intel License Manager for FLEXlm*.  Follow the directions below to obtain the host name and host id for each supported platform.

For CoFluent products: Please refer to product documentation for instructions on how to find your composite host ID for node-locked and floating licenses.

Microsoft Windows*
1. From the Start menu, click Run...
2. Type cmd in the Open: field, then click OK.
3. Type ipconfig /all at the command prompt, and press Enter.

In the resulting output, host name is the value that corresponds to Host Name, and host id is the value that corresponds to Physical Address.

For example, if the output of ipconfig /all included the following:
Host Name . . . . . . . : mycomputer
. . .
Physical Address . . . . : 00-06-29-CF-74-AA
then host name is mycomputer and the host ID is 00-06-29-CF-74-AA.

Linux*
1. Run the hostname command to display the host name.
2. Run the command /sbin/ifconfig eth0 to display the hardware address.
For example, if the /sbin/ifconfig eth0 command returns
HWaddr 00:D0:B7:A8:80:AA, then the host ID is 00:D0:B7:A8:80:AA.
It is strongly recommended that users run the lmhostid utility to obtain the hostid value required to generate the counted licenses. The lmhostid utility can be found in the install location to which Intel License Manager for FLEXlm* is installed.

Mac OS* X on Intel® Architecture
1. Run the hostname command to display the host name.
2. Run the command /sbin/ifconfig en0 ether to display the hardware address.
The following is an example of an address that could be returned by this command:
en0: flags=8863<UP,BROADCAST,SMART,RUNNING,SIMPLEX,MULTICAST> mtu 1500
ether 00:13:20:60:23:4f
It is strongly recommended that users run the lmhostid utility to obtain the hostid value required to generate the counted licenses. The lmhostid utility is installed to the same location as the Intel License Manager for FLEXlm*.

]]> http://software.intel.com/en-us/articles/how-to-find-host-id-for-floating-licenses/ Thu, 13 Aug 2009 00:00:00 -0700 http://software.intel.com/en-us/articles/how-to-find-host-id-for-floating-licenses/#comments http://software.intel.com/en-us/articles/how-to-find-host-id-for-floating-licenses/ Software Products General Intel® License Manager for FLEXlm* Knowledge Base Intel® Software Development Products Registration Center Knowledge Base Intel® Thread Checker for Windows* - Instrumentation

Contents:


What is instrumentation?
Intel® Thread Checker instruments software before tracing it to find errors. Instrumentation adds benign Thread Checker library calls into the software to be traced. The Thread Checker library calls record information about threads, including memory accesses and APIs used, in order to find threading diagnostics including errors.

There are two different kinds of instrumentation: source and binary instrumentation.


What is source instrumentation?
Source instrumentation is added by the Intel® C++ or Fortran Compiler when C++ or Fortran source code is compiled with the -Qtcheck (Microsoft Windows*) .


What is binary instrumentation?
Binary instrumentation is added at run-time to an already built (made) binary module, including applications and dynamic or shared libraries. The instrumentation code isautomatically inserted when you run an Intel® Thread Checker activity in the VTune™ environment or the Microsoft .NET* Development Environment.Both Microsoft Windows* and Linux* executables can be instrumented for IA-32 processors, but not for Itanium® processors. Binary instrumentation can be used for software compiled with any of the supported compilers.


What system resources does instrumentation use?
The process of adding source or binary instrumentation to your software or takes time (CPU MIPs) and memory. Once the instrumentation has been added, your software will both run slower and use more memory that it usually does. This is because as your software runs, the Intel® Thread Checker library is recording the memory accesses and threading APIs that each thread uses.

Can source and binary instrumentation be used together?
Yes. Some source files of one module (applications and dynamic or shared libraries) can be compiled with source instrumentation (/Qtcheck) while other files use binary instrumentation. Some modulesof a process may use source instrumentation while others use binary instrumentation.


Which is better, source or binary instrumentation?
In general, you will get more detailed diagnostics from Intel® Thread Checker by using source instrumentation; however, you should get similar diagnostics by using either instrumentation method.


When using Microsoft Windows* threads, should I use source or binary instrumentation?
Either source or binary instrumentation can be used. If you're using one of the Microsoft Visual* C++ compilers, then it is probably easiest to use binary instrumentation. If you're using an Intel® Compiler and it's easy to re-compile your source code, then consider making an Intel® Thread Checker build using the /Qtcheck option. This will provide you with the most detailed diagnostics from Thread Checker.

When using OpenMP* threads, should I use source or binary instrumentation?
On Microsoft Windows* systems, either source or binary instrumentation can usually be used. However, if your software uses thread-count dependant OpenMP*, and then binary instrumentation should be used with the Intel® Compilers v8.0, or higher.

Note: If binary instrumentation is used for OpenMP* software that is compiled and run with the Intel® Compilers any v7.0, then Intel® Thread Checker will produce incorrect results.


When using binary instrumentation, what level should I use?
Generally using the default instrumentation level of "All Functions" is recommended for User code (applications or dynamic or shared libraries). If you're concerned that Intel® Thread Checker might be missing some diagnostics and you can afford for Thread Checker to use more memory, then consider using the "Full Image" level. You should not reduce the instrumentation level below "All Functions" for your User code because then Thread Checker may not produce an accurate and complete diagnostic list.


How do I set the default instrumentation levels?

  • In the VTune™ environment, you can set the default instrumentation levels via the Configure " Options... " Intel® Thread Checker " Collector " Instrumentation Levels dialog.
  • In the Microsoft .NET* Development Environment, you can set the default instrumentation levels via the Tools " Options... " VTune™ Performance Tools " Intel® Thread Checker " Collector " Instrumentation Levels dialog.

Note: Setting the default levels in one environment, such as the VTune environment, does not propagate the changes to other environments, such as the Microsoft .NET* Development Environment.


The instrumentation level names have changed. How do these correspond to the old level names?
T his table lists the instrumentation level names used for Intel® Thread Checker by version number:

Version 2.x

 Version 1.0
Full Image All
Custom Image All (selective)
All Functions Partial
Custom Functions Partial (selective)
API Imports Not Applicable
Module Imports Minimal
 
]]> http://software.intel.com/en-us/articles/intel-thread-checker-for-windows-instrumentation/ Mon, 01 Dec 2008 00:00:00 -0800 http://software.intel.com/en-us/articles/intel-thread-checker-for-windows-instrumentation/#comments http://software.intel.com/en-us/articles/intel-thread-checker-for-windows-instrumentation/ Software Products General Intel® Thread Checker for Windows* Knowledge Base Intel® Thread Checker for Linux* - Instrumentation

Contents:


What is instrumentation?
Intel® Thread Checker instruments software before tracing it to find errors. Instrumentation adds benign Thread Checker library calls into the software to be traced. The Thread Checker library calls record information about threads, including memory accesses and APIs used, in order to find threading diagnostics including errors.

There are two different kinds of instrumentation: source and binary instrumentation.


What is source instrumentation?
Source instrumentation is added by the Intel® C++ or Fortran Compiler when C++ or Fortran source code is compiled with the -Qtcheck (Microsoft Windows*).

What is binary instrumentation?
Binary instrumentation is added at run-time to an already built (made) binary module, including applications and dynamic or shared libraries. The instrumentation code is automatically inserted when you run an Intel® Thread Checker activity in the VTune™ environment or the Microsoft .NET* Development Environment.


What system resources does instrumentation use?
The process of adding source or binary instrumentation to your software or takes time (CPU MIPs) and memory. Once the instrumentation has been added, your software will both run slower and use more memory that it usually does. This is because as your software runs, the Intel® Thread Checker library is recording the memory accesses and threading APIs that each thread uses.


Can source and binary instrumentation be used together?
Yes. Some source files of one module (applications and dynamic or shared libraries) can be compiled with source instrumentation (/Qtcheck) while other files use binary instrumentation. Some modules of a process may use source instrumentation while others use binary instrumentation.


W hich is better, source or binary instrumentation?
In general, you will get more detailed diagnostics from Intel® Thread Checker by using source instrumentation; however, you should get similar diagnostics by using either instrumentation method.


When using OpenMP* threads, should I use source or binary instrumentation?
On Microsoft Windows* systems, either source or binary instrumentation can usually be used. However, if your software uses thread-count dependant OpenMP*, and then binary instrumentation should be used with the Intel® Compilers 8.0, or higher.

Note: If binary instrumentation is used for OpenMP* software that is compiled and run with the Intel® Compilers any v7.0, then Intel® Thread Checker will produce incorrect results.


When using binary instrumentation, what level should I use?
Generally using the default instrumentation level of "All Functions" is recommended for User code (applications or dynamic or shared libraries). If you're concerned that Intel® Thread Checker might be missing some diagnostics and you can afford for Thread Checker to use more memory, then consider using the "Full Image" level. You should not reduce the instrumentation level below "All Functions" for your User code because then Thread Checker may not produce an accurate and complete diagnostic list.


How do I set the default instrumentation levels?

  • In the VTune™ environment, you can set the default instrumentation levels via the Configure " Options... " Intel® Thread Checker " Collector " Instrumentation Levels dialog.
  • In the Microsoft .NET* Development Environment, you can set the default instrumentation levels via the Tools " Options... " VTune™ Performance Tools " Intel® Thread Checker " Collector " Instrumentation Levels dialog.

Note: Setting the default levels in one environment, such as the VTune environment, does not propagate the changes to other environments, such as the Microsoft .NET* Development Environment.


The instrumentation level names have changed. How do these correspond to the old level names?
This table lists the instrumentation level names used for Intel® Thread Checker by version number:

Version 2.x

 Version 1.0
Full Image All
Custom Image All (selective)
All Functions Partial
Custom Functions Partial (selective)
API Imports Not Applicable
Module Imports Minimal
 
]]> http://software.intel.com/en-us/articles/intel-thread-checker-for-linux-instrumentation/ Mon, 01 Dec 2008 00:00:00 -0800 http://software.intel.com/en-us/articles/intel-thread-checker-for-linux-instrumentation/#comments http://software.intel.com/en-us/articles/intel-thread-checker-for-linux-instrumentation/ Software Products General Intel® Thread Checker for Windows* Knowledge Base Intel® Thread Checker for Windows* - Tips and Techniques

Page Contents:


I don't have source code. Can I use Intel® Thread Checker?
Yes. For example: You are using an executable file from another vendor, so you don't have source code to it. But you are interested in diagnostics about a library (.dll or .so file) that is loaded by the vendor's executable file. You may not even have source code for the library that gets loaded. You can still use Thread Checker to see if any threading diagnostics are detected.Of course, if you really want to correct threading issues, you'll need source code.


DOS* Shell Redirection for Input (<) or Output (>)
My application uses DOS* command-shell redirection for input (<) or output (>). Can I still use Intel® Thread Checker? Yes. Use a .BAT file as the application. For example, create a myStart.bat file with this line:
myProgram.exe < myInputFile > myOutputFile
And then follow the steps:
  1. Specify myProgram.exe as the Application to launch with the Intel® Thread Checker Wizard.
  2. Enable (check) Modify default configuration when done with wizard.
  3. Select Advanced Activity Configuration » Application/Module profiles.
  4. Select your application, which would be myProgram in this example, and then press the Configure... button.
  5. Disable (un-check) Add to Modules of Interest List, and then change the Application to Launch Filename: from myProgram.exe to myStart.bat.

Collecting Thread Checker Diagnostics Outside of the VTune™ Environment
To collect diagnostics outside of the VTune™ environment, follow this process:
  1. Compile your software using an Intel® Compiler and the /Qtcheck (on Microsoft Windows*) or -tcheck (on Linux*) switch. This option enables source instrumentation.
  2. Start your software as usual from the Windows*, DOS* or Linux* environment. For example, use Windows Explorer* to browse to your executable file and double-click on that file name.
  3. Run your software until it terminates normally. Don't forget to reduce your workload. Also because your software is instrumented, expect that it will run slower than usual.
  4. Exit (quit) your software, and a Thread Checker results ("*.thr") file is written to the working folder. If you are running on a Linux* system, transfer the .thr results file back to a Microsoft Windows* system (with Thread Checker installed) for viewing.
  5. To view the results file with Windows* Explorer, simply double-click the file. Alternatively you can start the VTune environment and open it with the File » Open File ... (NOT Open Project...) dialog. Important: Don't forget to set the file type to *.thr when using this dialog.
Keep in mind that when collecting data outside of the VTune environment, only software that has been source instrumented will be analyzed by Thread Checker. Therefore, threading errors in the not instrumented software may be missed. To ensure that all run-time code is instrumented, you must run from within the VTune environment or Microsoft .NET* Developer Environment.

Note: Many third-party libraries, such as MFC* (Microsoft Foundation Class*) libraries, create and use threads. Therefore, software that uses MFC should always be run from within the VTune environment or Microsoft .NET* Developer Environment


Analyze Multiple Processes or Executables
Intel® Thread Checker only supports one process (executable) when run from within either the VTune™ environment or Microsoft .NET* Developer Environment. Furthermore, Thread Checker only supports finding diagnostics within one process; that is it will not produce diagnostics for synchronization objects shared between processes. However if your software launches another process, Thread Checker can still be used to find threading diagnostics within either process. To use Thread Checker for either process, use source instrumentation and run your software outside of the VTune™ environment.


Using Intel® Thread Checker with Applications That Have to be started Outside of VTune
  1. Start VTune™ Performance Analyzer.
  2. Start Intel® Thread Checker Wizard to create a new project.
  3. Uncheck (de-select) Launch an Application.
  4. Check (select) Modify default configuration when done with wizard, and then click Next.
  5. Fill in your Modules of Interest. This should be your application and the DLLs (that you have symbols for) that your application depends on as it runs.
  6. Click Finish.
  7. Click Configure button to setup the Thread Checker data collector, and the select the Module Instrumentation tab.
  8. In the row with YourApp.exe, set the Force Instrumentation column to Yes. If you click No in this column, a drop down menu will appear to let you set it to Yes.

    Note: If you don't see the Force Instrumentation column, then you didn't Uncheck Launch an Application as described in step 3 above.
  9. Click OK for each of the two dialog boxes. Thread Checker will begin to instrument your software. Please be patient as this will take a while (usually several minutes).
  10. When Instrumentation has completed, Thread Checker will bring up a message box saying "It is time to run your application...". Click OK.
  11. Start your software in the usual manner from the Windows* desktop. Wait patiently for your software to complete and/or run your software until you have executed the code path(s) of interest. Execution speed will be much slower than normal as Thread Checker needs to collect a lot of data as it monitors all threads in your software; so don't forget to reduce your workload.

    Please Note: If you must abnormally terminate your software, you should use Windows Task Manager* and not the VTune environment Activity » Stop menu.
  12. When your software has terminated, go to the VTune environment and use the Activity » Stop menu (or Shift-F5) to stop Thread Checker data collection. Thread Checker results will be loaded and displayed in the VTune environment.
 
]]> http://software.intel.com/en-us/articles/intel-thread-checker-for-windows-tips-and-techniques/ Mon, 01 Dec 2008 00:00:00 -0800 http://software.intel.com/en-us/articles/intel-thread-checker-for-windows-tips-and-techniques/#comments http://software.intel.com/en-us/articles/intel-thread-checker-for-windows-tips-and-techniques/ Software Products General Intel® Thread Checker for Windows* Knowledge Base