| July 15, 2009 12:00 AM PDT | |
The Intel C/C++ and Fortran Compilers, versions 11.1 and 12.0, support the building of applications for Intel AVX. On Windows*, use the command line switch /QxAVX. On Linux*, use –xavx. The switches /QaxAVX (Windows) and –axavx (Linux) may be used to build applications that will take advantage of AVX instructions on Intel systems that support these, but will use only SSE instructions on other Intel or compatible, non-Intel systems. For example, to generate a specialized code path optimized for 2nd generation Intel(R) Core™ processors, and a default code path optimized for Intel processors or compatible, non-Intel processors that support at least the SSE3 instruction set, compile with /QaxAVX /arch:SSE3 (Windows) or with -axavx -msse3 (Linux).
Both C/C++ and Fortran compilers support automatic vectorization of floating-point loops using AVX instructions. The C/C++ compiler also supports AVX-based intrinsics (via the header file immintrin.h) and inline assembly. Intel AVX allows the vectorization of a wider variety of floating point loops than Intel SSE, with a greater potential performance gain due to the greater width of the SIMD registers. The vectorizer is enabled automatically by the switches listed above. To see which loops have been vectorized, use the switch /Qvec-report1 (windows) or –vec-report1 (Linux).
The 2nd generation Intel® Core™ processor family supports Intel AVX. In addition, the Intel® Software Development Emulator (Intel® SDE) is available for testing programs built for Intel AVX. See http://software.intel.com/en-us/articles/intel-software-development-emulator/.
Further general information about the Intel Compilers for C/C++ and Fortran is available at http://software.intel.com/en-us/intel-compilers/ . Further information about compiler support for Intel AVX may be found in the Intel C++ Compiler User and Reference Guides, for example in the section 'Intrinsics for Advanced Vector Extensions', accessible online at http://software.intel.com/sites/products/documentation/hpc/composerxe/en-us/2011Update/cpp/win/index.htm.
The attached presentation in PDF format contains additional detail on compiling for the Intel AVX instruction set and the Intel 2nd Generation Core processor family, including a section on loop vectorization.
| Optimization Notice |
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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |
This article applies to: Parallel Programming, Intel® C++ Compiler for Linux* Knowledge Base, Intel® C++ Compiler for Windows* Knowledge Base, Intel® Fortran Compiler for Linux* Knowledge Base, Intel® Parallel Composer Knowledge Base, Intel® Visual Fortran Compiler for Windows* Knowledge Base
For more complete information about compiler optimizations, see our Optimization Notice.
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