Intel® Decimal Floating-Point Math Library

Product Overview

Software implementation of the IEEE 754R Decimal Floating-Point Arithmetic specification aimed at financial applications, especially in cases where legal requirements make it necessary to use decimal, and not binary floating-point arithmetic (as computation performed with binary floating-point operations may introduce small, but unacceptable errors).

Features and Benefits

Ensures compliance with the upcoming revision of the IEEE Standard for Floating-Point Arithmetic. The library implements the functions defined for decimal floating-point arithmetic operations in the 'DRAFT Standard for Floating-Point Arithmetic P754', which is a revision of the IEEE Standard 754-1985 for Binary Floating-Point Arithmetic. There is no IEEE publication of the revised standard draft at the present time, but on-line resources such as Wikipedia (search for 'IEEE 754r') offer ample information and links to relevant sites. The Intel(R) Decimal Floating-Point Math Library supports primarily the binary encoding format for decimal floating-point values, but the decimal encoding format is supported too in the library, by means of conversion functions(*) between the two encoding formats.

Release 1.0 of the library contained in this package implements all the operations mandated by the 'DRAFT Standard for Floating-Point Arithmetic P754'. For operations involving integer operands or results, the library supports signed and unsigned 8-, 16-, 32-, and 64-bit integers.

The library package contains: (1) a copy of the end user license agreement; (2) a README FILE; (3) a LIBRARY subdirectory with all the source files necessary to build the library, and a README file which specifies how to build the library in Linux**, HP-UX**, Windows***, and other operating systems; (4) a TESTS subdirectory with source and input files necessary to build and run a reduced set of tests for the library and a README file which specifies how to build and run these tests; (5) an EXAMPLES subdirectory containing eight examples of calls to library functions with various combinations of build options.

Technical Requirements

This generic package will run on any platform in Linux, Windows, HP-UX, Solaris, OSX.

Primary Technology Contact

Marius Cornea is a principal engineer in Intel's Software & Solutions Group. He holds a master's degree in Electrical Engineering and a Ph.D. degree in Computer Science from Purdue University in West Lafayette, IN. Since joining Intel in 1994, his work is related to scientific computation, design and development of numerical algorithms, floating-point emulation, exception handling, and new floating-point instruction definition and analysis. His e-mail is marius.cornea@intel.com.

Comments (9)

March 18, 2009 1:48 PM PDT

tryrtyyy

Total Points:
5
Registered User

Sory Can't download library.... BAd

March 19, 2009 9:14 PM PDT

Marius

Hi, the download works for me. Please try again - thank you

May 24, 2009 5:43 PM PDT

Byeongheon Cho

I want to test this library.

June 1, 2009 12:31 PM PDT

Marius Cornea

Hello Byeongheon,
I was out of the office for the past two weeks, so I only saw your message today. Were you able to download the library?
Thanks,
Marius Cornea

June 15, 2009 1:53 PM PDT

dweeberlyloom

Total Points:
6,630
Status Points:
6,130

Brown Belt

Sorry I know these may be questions that can't be "officially" answered, but I'm curious and would be happy if you could give hints at unofficial answers :-)

Does Intel plan to fully support the IEEE 754-2008 in future hardware?

Any idea as to when this might happen?

Thanks

June 15, 2009 3:55 PM PDT

Marius Cornea

Hi,
Actually, in my personal opinion there will not be a complete hardware implementation of the IEEE Standard 754-2008 any time soon (i.e. for many years to come). The reason is that there are many features in the standard - take correctly rounded transcendentals for example - that are extremely costly to implement in hardware, while very good software solutions exist, or can be found. There is no good justification to have a hardware-only implementation.
Marius Cornea

June 16, 2009 9:27 AM PDT

dweeberlyloom

Total Points:
6,630
Status Points:
6,130

Brown Belt

Weren't similar things said in 85. I mean if anyone (like a scientist or engineer) need that kind of fp performance they could buy a 8087 ;-)

I would think that decimal and long double (128 bit) would benefit considerably from direct hardware support. Still it would not surprise me if a full hardware implementation would take a couple of years (assuming the changes have been anticipated and are already 'in the pipe').

June 16, 2009 11:02 AM PDT

Marius Cornea

The Intel® 8087 implemented everything that was important in the old IEEE standard 754 (even before it became a standard), but left certain operations to software. This will most likely be the case with the new standard too and any future hardware implementations of it (or rather of a subset; as the standard states, it is acceptable to implement it in a combination of HW and SW - no one can realistically expect a hardware-only implementation)

November 19, 2009 12:15 AM PST

Timothy

There are 3 CPU designs that presently implement IEEE 754-2008. The first was the IBM System z9, in microcode. That was a prudent design approach since the z9 started shipping in 2005 (with the DFP-capable microcode somewhat later), well before the standard was officially finalized. A microcode (or what IBM more correctly calls millicode) implementation allowed any post-shipment correction if the draft standard shifted while still providing an orders-of-magnitude performance boost versus a software implementation.

IBM's POWER6 (2007) and System z10 (2008) processors both implement IEEE 754-2008 fully in hardware and in every core. By the time they shipped there was much less uncertainty about the final standard.

If you're a "CPU geek," there's a technical paper describing the z10 hardware implementation here:

http://www.research.ibm.com/journal/rd/531/schwarz.pdf

The z10 DFP implementation is very similar to POWER6. There are 54 DFP instructions implemented in hardware, and they are common to the POWER6 and z10 CPUs (and z9, for that matter). The z10 decimal floating point unit adds support for 13 decimal fixed-point instructions, but these are simply preexisting instructions traditionally important to the z CPU family that were relocated and reimplemented for z10, to improve their performance.