Intel® Parallel Composer Knowledge Base

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Title Modified Date
Performance Tools for Software Developers - Loop blocking
Loop blocking is a combination of strip mining and loop interchange to enhance reuse of local data. It helps the nested loops that manipulate arrays and are too large to fit into the cache. The loop blocking allows reuse of the arrays by transforming the
Type: Performance and Optimization
07/13/2009
Performance Tools for Software Developers - Auto parallelization and /Qpar-threshold
The article describes effect of /Qpar-threshold option when doing auto parallelization with Intel C++ compiler.
Author: Om Sachan (Intel)
Type: Performance and Optimization
07/13/2009
Intel® compiler options for SSE generation (SSE2, SSE3, SSSE3, SSE4) and processor-specific optimizations
Explains which Intel Compiler switches to use to target and optimize for a specific platform, cpu or processor.
Type: Performance and Optimization
07/13/2009
Excerpts from Intel IPP 2nd Edition Book on Threading Support
It lists 4 excerpts from Intel IPP 2nd Edition book to cover brief threading support in several Intel IPP domains video coding, image coding, graphics and image processing.
Author: Ying Song (Intel)
Type: Performance and Optimization
06/23/2009
An Overview of the Parallelization Implementation Methods in Intel(R) C++ Compilers
Description of the various ways you can use Intel® C++ Compilers to enable your applications for multi-core and many-core.
Author: Mark Sabahi (Intel)
Type: Performance and Optimization
06/19/2009
Intel® Core™ i7 processor Support
Describes how the new version of Intel IPP v6.0 supports Intel® Core™ i7 processor (codenamed "Nehalem")
Author: Ying Song (Intel)
Type: Performance and Optimization
06/14/2009
IA-32 and Intel®64 Processor Targeting Overview
The compiler supports many options that tune or optimize an application for different Intel and non-Intel processors. Differences are explained, and the switches /arch, /Qx..., /Qax... (Windows*) and -m, -x..., -ax... (Linux*, Mac OS* X) are recommended.
Author: Martyn Corden (Intel)
Type: Performance and Optimization
04/06/2009
Optimizing Applications with Intel(R) Parallel Composer
This document describes how developers can use Intel® Parallel Composer to optimize applications for IA-32 and Intel® 64 processors.
Author: Bonnie Aona (Intel),Martyn Corden (Intel)
Type: Performance and Optimization
03/26/2009
OpenMP* Loops with Function Calls for Bounds May Not Parallelize
Loops with function calls as bounds (such as STL end() calls) may not be compiled into parallel even if OpenMP APIs are explicitly used.
Author: Brandon Hewitt (Intel)
Type: Performance and Optimization
03/12/2009
Disable movbe to Test Intel® Atom™ Processor Targeted Code on non-Intel® Atom™ Processor Platforms
For those looking to validate code targeted for the Intel® Atom™ processor on other Intel Architectures, a mechanism to disable generation of the movbe instruction is provided.
Author: Brandon Hewitt (Intel)
Type: Performance and Optimization
02/20/2009
Requirements for Vectorizable Loops
Vectorization is one of many optimizations that are enabled by default in the latest Intel compilers. In order to be vectorized, loops must obey certain conditions, listed below. Some additional ways to help the compiler to vectorize loops are described.
Author: Martyn Corden (Intel)
Type: Performance and Optimization
01/29/2009
Performance Tools for Software Developers - SSE generation and processor-specific optimizations continue
Can I combine the processor values and target more than one processor? How to generate optimized code for both Intel and AMD* architecture? Where can I find more information on processor-specific optimizations?
Type: Performance and Optimization
11/06/2008
Intel® IPP threaded functions
It lists the information where to find the threaded Intel IPP from each release.
Type: Performance and Optimization
09/19/2008