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    <title>Intel Software Network Comments Feed</title>
    <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained</link>
    <description></description>
    <language>en-us</language>
    <item>
      <title>By Dr. tarek hindam</title>
      <description><![CDATA[ the searsh engine did not offered what i need? for example i ask the questions
1. what is the simplified hardware architecture of multi-core processor?
    for example the hardware core share one physical memory bus.
    each core has one cache and one ram.
    could the internal memory bus supports any accelerator integrated inside the ship during the design phase?
    or any accelerator could be pluged outside the ship? ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-22720</link>
      <pubDate>Thu, 16 Apr 2009 07:56:09 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-22720</guid>
    </item>
    <item>
      <title>By deepadanalakshmi</title>
      <description><![CDATA[ i was referring about the software implications it was well explianed ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-44705</link>
      <pubDate>Sat, 12 Jun 2010 07:23:50 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-44705</guid>
    </item>
    <item>
      <title>By Velmani</title>
      <description><![CDATA[ Hi,
This gave me clear picture of Processors (HT, Dual core,core-2duo) etc..
Thanks to author & Intel. 

 ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-46572</link>
      <pubDate>Sun, 25 Jul 2010 01:31:53 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-46572</guid>
    </item>
    <item>
      <title>By prajwal  H E</title>
      <description><![CDATA[ thank u sir for tat wonderful piece of explanation.....but my doubt is cant v use hyper threadin technology in multi core processors.......? say like combining u r fig 1b with fig 2....... ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-47255</link>
      <pubDate>Wed, 11 Aug 2010 10:30:36 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-47255</guid>
    </item>
    <item>
      <title>By Todd Bezenek</title>
      <description><![CDATA[ Now we need good software to help us program these.  The Intel Parallel Studio is moving us in that direction.

-Todd ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-51724</link>
      <pubDate>Sat, 13 Nov 2010 00:05:53 -0800</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-51724</guid>
    </item>
    <item>
      <title>By Jason</title>
      <description><![CDATA[ Excellent article.  Information was well organized, and easy to understand.  As a future programmer, I look forward to being able to take advantage of multi-core technology. ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-57691</link>
      <pubDate>Sun, 20 Mar 2011 12:41:36 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-57691</guid>
    </item>
    <item>
      <title>By richa</title>
      <description><![CDATA[ I need information about issues involved in writing code for multicore architecture.
how the programs can be implemented?
thanks..... ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-59765</link>
      <pubDate>Fri, 13 May 2011 23:45:23 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-59765</guid>
    </item>
    <item>
      <title>By rasht</title>
      <description><![CDATA[ core i3 speed 3.06GHz
core i5 speed 2.53GHz     Why?
which is better processor? ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-61442</link>
      <pubDate>Sat, 02 Jul 2011 08:11:29 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-61442</guid>
    </item>
    <item>
      <title>By Jim Williams</title>
      <description><![CDATA[ Dr. tarek hindam - Asked my question "what is the simplified hardware architecture of multi-core processor?" but I'd like to amplify.
Does each core have:
* An ALU
* A Program Counter
* A Program Register
* Dedicated Registers (A, B, C, etc.) - How many?
Or are some of these processing units shared?
How do the cores share processing?  Is it time sliced
Does the clock strobe all cores simultaneously or uniquely?
and then Dr.Hindam's question how many BUSS's are there? and is there RAM/memory?

Thank you in advance for your reply ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-61803</link>
      <pubDate>Tue, 12 Jul 2011 09:19:37 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-61803</guid>
    </item>
    <item>
      <title>By Intel Software Network Support</title>
      <description><![CDATA[ Hello,

For questions related to software development, please use our forum at http://software.intel.com/en-us/forums/.

For information about particular Intel processors, please use our web site at http://ark.intel.com.

Best regards,

==
Aubrey W.
Intel(R) Software Network Support ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-61804</link>
      <pubDate>Tue, 12 Jul 2011 09:40:50 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-61804</guid>
    </item>
    <item>
      <title>By Madhukar Shelar</title>
      <description><![CDATA[ Is it necessary to design query processors of DBMS software to utlilize multiple cores of processor? Or Will the Operating system manage the things?
 ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-62889</link>
      <pubDate>Fri, 12 Aug 2011 09:18:05 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-62889</guid>
    </item>
    <item>
      <title>By Applied dimensionality - Do you want your TM1 go twice faster on Intel-box? Turn HyperThreading off</title>
      <description><![CDATA[ n/a ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-67223</link>
      <pubDate>Wed, 23 Nov 2011 19:24:11 -0800</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-67223</guid>
    </item>
    <item>
      <title>By Amrita Roy</title>
      <description><![CDATA[ explain the working mechanism of dual-core processors and also explain the paging system(memory management system) of the processor... ]]></description>
      <link>http://software.intel.com/en-us/articles/multi-core-processor-architecture-explained/#comment-69938</link>
      <pubDate>Fri, 03 Feb 2012 20:33:20 -0800</pubDate>
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