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<!-- Generated on Wed, 25 Nov 2009 15:24:04 -0800 -->
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    <title>Intel Software Network Comments feed</title>
    <link>http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/feed/</link>
    <description></description>
    <language>en-us</language>
    <item>
      <title>By alglib</title>
      <description><![CDATA[ Cool articles. 

May be you can take me some advise. I want swap bytes in the xmm0. Do something like this:

__declspec( align(16) ) BYTE g_carReverseC1ShufleMask[16] =
{
	0x0F, 0x0E, 0x0D, 0x0C, 0x0B, 0x0A, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00,
};

_asm
{

	movdqa xmm1, oword ptr [g_carReverseC1ShufleMask]

	....

	pshufb xmm0, xmm1
}

It&#39;s perfect, but &#34;pshufb&#34; is SSE3, and question is can i do something like this in &#34;SSE1&#34;? 
 ]]></description>
      <link>http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/#comment-9073</link>
      <pubDate>Tue, 18 Nov 2008 03:33:39 -0800</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/#comment-9073</guid>
    </item>
    <item>
      <title>By srimks</title>
      <description><![CDATA[ How can I get information about instuctions cycles and latency number, could you share the reference(s) which diclose that.

~BR ]]></description>
      <link>http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/#comment-30176</link>
      <pubDate>Tue, 25 Aug 2009 17:54:56 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/#comment-30176</guid>
    </item>
    <item>
      <title>By Khang Nguyen (Intel)</title>
      <description><![CDATA[ Hi BR,

You can find information about instruction cycles and latency numbers at:

http://www.intel.com/products/processor/manuals/index.htm

Appendix C, Opt manual.

Best,
Khang
 ]]></description>
      <link>http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/#comment-30555</link>
      <pubDate>Wed, 02 Sep 2009 10:12:24 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/optimizing-for-the-intel-pentiumr-4-processor-using-assembly-language/#comment-30555</guid>
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