Welcome to Intel Platform Monitoring Community!
Here you will find information covering performance monitoring and software tuning, and platform monitoring topics. Performance monitoring covers a variety of topics including an introduction to monitoring and software tuning methodologies, as well as software optimization techniques and best know methods (BKMs) for novice and more advanced users.
For developers, programming reference manuals are available with the latest information describing the hardware interface of the Performance Monitoring Unit (PMU) of Intel microprocessors including core and un-core monitoring resources, as well the definitive source of information on performance events which may be monitored.
Platform monitoring includes machine monitoring topics such as monitoring CPU core and graphics processors and other system coprocessors as well as metering and quality of service.
- Gathering Events, one moment...
On Jan 5, 2011, Intel launched the 2nd Generation Intel® Core™ processor family (formerly code-named Sandy Bridge) for laptops and PCs. The new processors have a revolutionary new architecture that combines the computing “brain,” or microprocessor, with a graphics engine on the same die for the very first time. New features include Intel® Insider™, Intel® Quick Sync Video, and a new version of the company's award-winning Intel® Wireless Display (WiDi), which now adds 1080p HD and content protection for those wishing to beam premium HD content from their laptop screen to their TV.
Stay connected. Visit often. We will be posting the PMU programming guides and updated tools to give you the latest information on the new Intel microarchitecture innovations
For more complete information about compiler optimizations, see our Optimization Notice.
Mike Chynoweth
I have been working with Intel for 11 years plus ~1 year of internship. I have worked in performance across server, client and most recently on SOCs in SmartTV and Tablets. Throughout my career I have worked on pushing the boundaries of performance analysis through creating tool sets to implement new and unique methodologies for uncovering architectural, code generation and system bottlenecks. I also enjoy playing the didgeridoo, hiking, cycling and spending time with my little girl Maya and my wife Jessica.
Years at Intel: 11
Background: Bachelors in Chemical Engineering from University of Florida
Current Work: I am currently working on how to resolve performance issues in the SOC space where extremely complex platform and software interaction issues are abundant. My current research revolves around how to positively impact the responsiveness and feel of the platform during a given workload. In the past, our traditional performance work involved a small set of stead-state workloads which were bound mostly in the CPU and could be run over a 20-30s period. Our new environment involves a much larger set of non-steady state workloads which are bound in many different components across the system. Many of these workloads run in 0.5 to 1.5s range and are difficult to reproduce between runs.
What you like about working at Intel: Intel consistently throws larger and more complex issues my way. I thrive on finding new and unique methodologies of performance analysis to identify and fix the current “unsolvable” issues. I am part of a team that works together to solve new issues in the industry and we have been distributing a tool internally for ~6 years internally within Intel which has just gone external under the title of PBA. The PBA toolset is written and maintained by performance engineers who are actively working on performance and power optimizations in the field. We dynamically enable functionalities to overcome limitations in currently available toolsets and then publish the newly created studies across Intel and externally (after more extensive testing is accomplished). The PBA toolset can be found at the following link with a description of its current public capabilities:
Intel Performance Bottleneck Analyzer
PBA Description: The Intel® Performance Bottleneck Analyzer (Intel® PBA) framework seeks to relate knowledge of static assembly and latest performance monitoring techniques to automatically find and prioritize architectural bottlenecks for the Intel® Core™ Processor Family and the Intel® Atom™ processor. The bottlenecks which cannot be explained are prioritized and tagged for further analysis. To accomplish this goal, the tool utilizes performance monitoring data to recreate the hottest paths of instruction execution through a binary. The recreated paths of execution are then passed through an analysis which combines searches for well known code generation issues with knowledge of hundreds of the performance monitoring events.