| March 9, 2009 9:00 PM PDT | |
Avoid program exceptions associated with misaligned data objects in the 64-bit Intel® architecture. Under both Linux* and Win64*, developers will often encounter data-alignment errors during migrations from 32-bit to 64-bit architecture. These errors are related to the location of data items in memory, relative to addresses that are multiples of 4, 8, or 16 bytes.
Under the 16-bit Intel architecture, data alignment had little effect on performance, and its use was entirely optional. Under 32-bit Intel architecture, aligning data correctly can be an important optimization, although its use is still optional with very few exceptions where correct alignment is mandatory. The 64-bit Intel architecture, however, imposes more-stringent requirements on data items. Misaligned objects cause program exceptions.
Align all structures on 16-byte boundaries. This alignment is required if the structures are larger than 16 bytes, and only recommended if they are not.
The fundamental rule of data alignment is that the safest (and most widely supported) approach relies on the natural boundaries. Those are the boundaries that occur when you round up the size of a data item to the next largest size of 2, 4, 8, or 16 bytes. For example, a 10-byte float should be aligned on a 16-byte address, whereas 64-bit integers should be aligned to an 8-byte address. Because this is a 64-bit architecture, pointer sizes are all 8 bytes wide, Thus, they too should align on 8-byte boundaries.
Aligning data correctly within structures can cause data bloat (due to the padding necessary to place fields correctly), so where necessary and possible, it is useful to reorganize structures so that fields that require the widest alignment are first in the structure.
The restrictions on data alignment have been slightly eased in the Itanium® processor (relative to the Itanium® processor) if the proper flags are set in code. (Check your manuals for the exact settings.) The relevant section from the Intel® Itanium® Processor Reference Manual (Section 5.5) states: "The Itanium processor implementation supports arbitrary load and store accesses except for integer accesses that cross 8-byte boundaries and any accesses that cross 16-byte boundaries." It explains that data items can occur within an aligned window, which simply reiterates the requirement that the boundaries not be crossed.
For this less-stringent scheme to work, the linkers and operating system must go along with these specifications. If they enforce the tighter requirements, you will have to do so as well.
Data Alignment when Migrating to IA-64
Preparing Code for the IA-64 Architecture (Code Clean)
For more complete information about compiler optimizations, see our Optimization Notice.
