Short Data Segment Overflow Errors on 64-Bit Architecture

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January 26, 2009 11:00 PM PST


Challenge

Solve a potential short data segment overflow link error on Intel® Itanium® Architecture on Linux* 64 platforms when building very large static images. This problem exists on Windows* 64 and with Microsoft and Intel® compilers (C/C++ and FORTRAN). The Itanium processor runtime architecture conventions require that there be only one short data segment in every load module. Further, current implementation limits the size of short data segments to 4MB, since memory references are calculated using 22-bit immediate add instruction sequence. The linker error is caused by excessive data in the short data segment, overflowing the 4MB size limit. The problem gets worse when the debug option (-g) is used, because this creates additional temporary data and labels necessary for debugging.

There are two ways to overflow the 4MB size limit of short data segment:

  • Case 1: Declare more than 4MB of global variables in the load module, overflowing short data area or short bss area.
  • Case 2: Overflow the linkage table. A linkage table larger than 4MB will overflow the short data segment, because the linkage table is in the short data segment.

 

Solution

Implement the Huge Memory Model, which ensures proper addressing of short data segment in overflow situations. The Huge Memory Model is described in the Itanium runtime conventions guide, but it is not yet implemented for the compilers for Itanium architecture. This model uses the 64-bit movl instruction followed by full 64-bit add instruction sequence to form the address to reference, increasing the offset distance to 64-bit width, instead of 22-bit width. In order to implement this model, the compiler is required to generate three instruction sequences, and the linker to implement a different relocation type. The performance implication is as follows:

  • Traditional short data: uses two-instruction sequence for speedy data, directly accessing data by base+displacement.
  • Huge-memory model: uses three-instruction sequence for medium speed data, directly accessing data by base+displacement.
  • Traditional long data: uses three-instruction sequence for slow data, indirectly accessing data by double-load sequence.

 

Source

A more exhaustive implementation of this solution, including C/C++ and FORTRAN source code, is available in the article Short Data Segment Overflow Error on Linux* 64 on Itanium® Architecture