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    <title>Intel Software Network Comments Feed</title>
    <link>http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx</link>
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    SOA Cloth Simulation with 256-bit Intel® Advanced Vector Extensions (Intel® AVX) - Intel® Software Network 
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      <description><![CDATA[ n/a ]]></description>
      <link>http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx/#comment-54591</link>
      <pubDate>Sat, 08 Jan 2011 10:40:54 -0800</pubDate>
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      <title>By erwincoumans</title>
      <description><![CDATA[ 
In case you want to try out this cloth demo on a system without AVX, I recompiled the demo using AVX emulation. The SSE version should still run at full speed.

See http://code.google.com/p/bullet/issues/detail?id=474#c4
 ]]></description>
      <link>http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx/#comment-55035</link>
      <pubDate>Sat, 15 Jan 2011 16:26:36 -0800</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx/#comment-55035</guid>
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    <item>
      <title>By Stan Melax (Intel)</title>
      <description><![CDATA[ for more information...
an educational video that makes sense of the x86 works including avx (simd parallelism) and out-of-order execution (instruction parallelism) at the link:   http://www.gdcvault.com/play/1014645

A short writeup "Dont spill that register" can be found at:  http://software.intel.com/en-us/articles/dont-spill-that-register-ensuring-optimal-performance-from-intrinsics/
This explains a bit of background why the x64 version (with 16 ymm rigisters instead of 8) is slightly faster than the 32 bit x86 compile


 ]]></description>
      <link>http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx/#comment-58051</link>
      <pubDate>Wed, 30 Mar 2011 23:29:35 -0700</pubDate>
      <guid isPermaLink="true">http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx/#comment-58051</guid>
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      <title>By Stan Melax (Intel)</title>
      <description><![CDATA[ > why is the downloadable sample version uglier than some of the screenshots and video?

Two reasons.  
First, the sample is essentially a small-as-possible avx "hello world" program and thus kept to a minimum to make it easy to study the source code, keep the textures small, etc.

Second, as explained in the paper, an 8x8 transpose is used to convert SOA to a AOS vertex buffer.  In the sample version this is position xyz normal xyz and texcoord uv.  i.e 8 floats.  In another "demo" version of this same simulation, i still do the 8x8 transpose, but instead of normal's xyz, i pass in the xyz components of the quaternion that represents the tangent space basis - i.e. the vertex orientation.  The vertex shader easily recomputes the w value of the quaternion.   This orientation gives me the tangent space basis and lets me do any sort of anisotropic lighting that i want such as velvet or parallax mapping etc.  And the best part is that everything still fits in 8 floats per vertex and thus i still get to use the efficient AVX shuffle patterns for the physics to vertex buffer conversion.  That's good because, after the solver, this is one of the next major hotspots in the simulation and thus needs to be done efficiently.


 ]]></description>
      <link>http://software.intel.com/en-us/articles/soa-cloth-simulation-with-256-bit-intel-advanced-vector-extensions-intel-avx/#comment-58053</link>
      <pubDate>Wed, 30 Mar 2011 23:52:19 -0700</pubDate>
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