Ultrabook™ and the Intel® Energy Checker SDK
The Intel® Energy Checker SDK can be used to instrument an application and collect data to help a developer pinpoint power hungry features that can be optimized for power. Type: Code |
ultrabook "Intel Energy Checker SDK" |
01/24/2012
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How to Automate Static Security Analysis with Intel(R) C++ Compiler for Linux*
This article shows a BKM on how to automate the static security analysis check done by the Intel(R) C Compiler for Linux. Type: Code |
Security Community |
01/17/2012
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Using Intel® Cilk™ Plus to Achieve Data and Thread Parallelism: A Case Study for Visual Computing
Multicore systems with advanced vector instructions are moving into many domains: from servers, workstations, and desktops, to laptops and mobile devices. There is potential for improving the performance of user applications by exploiting both data and th Type: Code |
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09/16/2011
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Manageability Developer Tool Kit Source Code
License Agreement
IMPORTANT - READ BEFORE COPYING, INSTALLING OR USING..
End User License Agreement for theManageability Developer Tool KitCopyright © 2008-2011 Intel CorporationAll rights reserved.
... Type: Code |
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06/08/2011
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Using Intel® TBB in network applications: Network Router emulator
Network Router emulator - a sample project demonstrating applicability of Intel® TBB for composing packet processing applications. Type: Code |
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06/01/2011
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Simplifying the use of IPP in WPF, Visual Studio and Managed code.
Introduction
The IPP 7.0 DLLs now have the same names for both the 32 and 64 bit version. Under the previous versions, the names were different; e.g., ippcore-6-1.dll for the 32 bits and ippcoreem64t ... Type: Code |
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04/04/2011
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Fireflies - Scalable Ambient Effects
Fireflies is a tech sample demonstrating a scalable ambient effect. In this sample, the ambient effect is a swarm of fireflies that scatter and reform into a walking character. Using Intel TBB, the firefly flight trajectory calculations performed per fram Type: Code |
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01/07/2011
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FFT length and layout advisor
Multidimensional Fast Fourier Transform (FFT) - selecting optimal sizes and data layout Type: Code |
fast fourier transform FFT data layout FFT size Discrete Fourier Transform |
12/14/2010
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EvenOdd Variants-Part 2.1
In the Even odd variant series so far, for the code submitted, I requested Dr. Heinz Kabutz, Java Champion, to review and consider it as a topic for Java Specialists Newsletter published by him. The review comments have been addressed in this article. Type: Code |
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11/22/2010
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How to switch between Intel® VTune™ Performance Analyzer and Intel® PTU
Switch between Intel VTune Performance Analyzer and Intel PTU is important. Regarding PTU documentation, PTU and VTune environements are not compatible. You must be sure to unload one before loading the other. Type: Code |
Intel VTune VTune Performance Analyzer |
10/29/2010
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EvenOddVariants - Part 2
This is the second part of the series published earlier EvenOddVariants
This article suggests different ways in which co-ordination can be achieved between two or more threads using even and odd number generation as an example.
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09/21/2010
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Intel® Compiler Options for Intel® SSE and Intel® AVX generation (SSE2, SSE3, SSE3_ATOM, SSSE3, SSE4.1, SSE4.2, AVX, AVX2) and processor-specific optimizations
Explains which Intel® Compiler switches to use to target and optimize for a specific platform, microarchitecture, CPU or processor. Type: Code |
dual-core xeon pentium SSE2 SSE3 SSE Core 2 Duo SSE4.2 SSSE3 SSE4.1 MMX Core 2 Quad atom Core i7 compiler AVX vcsource_domain_media vcsource_os_windows vcsource_platform_desktoplaptop vcsource_domain_graphics vcsource_product_icc vcsource_index |
09/02/2010
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Intel® AVX C/C++ Intrinsics Emulation
This C/C++ header file can be used for AVX emulation on Intel CPUs/processors without h/w AVX support Type: Code |
C/C++ intrinsic emulation AVX Sandy Bridge |
06/24/2010
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Using the Microsoft* debug heap manager with memory error analysis of Intel® Parallel Inspector
Insight and recommendations to using memory error analysis of Intel Parallel Inspector with the Microsoft C Runtime’s debug heap manager, which by default enables dialogue boxes such as HEAP CORRUPTION DETECTED, and tracks memory usage. Type: Code |
Intel Parallel Inspector Microsoft C runtime library debug heap manager corruption detected |
05/13/2010
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API Detects IA-32 and x64 Platform CPU Characteristics
by Eric Palmer
Sr. Application Engineer, Software Enabling Division
Why Should I Care About This Code Sample?
This API with example Windows* utility is useful for detecting IA-32 CPU characteris ... Type: Code |
xeon pentium CPUID Code Affinity-mask |
02/12/2010
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UML is equivalent to Sign-language
Using graphics (instead of programming) to communicate with computers, is equivalent to, using sign-language (instead of English) to communicate with humans.1. Each one (UML and Sign-language) is const ... Type: Code |
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07/23/2009
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Parallel Lint
The article describes a new direction in development of static code analyzers - verification of parallel programs. The article reviews several static analyzers which can claim to be called "Parallel Lint". Type: Code |
параллельное программирование VivaMP компилятор Intel C++ |
06/15/2009
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Compiler Settings for Threading Error Analysis in Intel® Parallel Inspector
A list of compiler switches which have impact on Threading Error Analysis in Intel® Parallel Inspector Type: Code |
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03/18/2009
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Data Race Identified on Atomic Construct (Win32 Interlocked… functions, #pragma omp atomic, or atomic template)
How to handle when Intel® Parallel Inspector identifies data races on an atomic construct and a read of a memory variable. Type: Code |
Intel® Parallel Inspector atomic LOCK LOCK# data race |
03/16/2009
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Compiler Settings for Memory Error Analysis in Intel Parallel Inspector
A list of compiler switches which have impact on Memory Error Analysis in Intel® Parallel Inspector Type: Code |
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01/19/2009
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Compiler Switches for Intel® Parallel Amplifier
A list of switches which have impact on Intel® Parallel Amplifier Type: Code |
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01/19/2009
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High Clocks Per Instruction Retired when vectorizing the loop.
Sometimes when we vectorize a loop, we get a high Clocks Per Instruction Retired (CPI) value. This happens when there is high bus utilization and the bus gets saturated. Type: Code |
simd SSE2 SSE3 SSE4 SSE High CPI Vectorizer hardware prefetcher SSE1 Memoray latency BUS Saturation Vtune |
11/18/2008
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Mobility Code & Downloads
Google Gadget For Desktop Search Battery Monitor
Intel® Web 2.0 Technology Development Kit (TDK)
Intel® Laptop Gaming Technology Development Kit
Intel Performance Power Monitor Plug-in for Google ... Type: Code |
Energy Efficient MPSDK Code MID |
06/23/2008
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