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      <title>Designing Application Software for Energy-efficient Performance</title>
      <description><![CDATA[ <b>By Nancy Nicolaisen</b><br /><br />Personal computers are designed to be in processor idle 75% of the time but in fact might more realistically be estimated to be idle in excess of 90% of the time because of the effects of imposed waits for user input, server response, and resource availability. An idle processor is available to sleep and, while in a sleep state, can save most of the energy it would otherwise consume from actively executing. At least on the client side, if all of the theoretical energy-saving potential of processor sleep states were realized, end user energy use could shrink by fantastical amounts with no apparent sacrifice of functionality or productivity.<br /><br />This, however, is not today’s status quo. For various reasons, users sometimes intentionally configure client systems not to sleep, and it is not uncommon for application software to inadvertently (or intentionally) prevent CPUs from entering sleep states. Application developers can’t do anything about the former. However, there is a lot they can do to make sure the sophisticated laptop and tablet solutions they design, code, and deploy are energy efficient. In addition, if targeting a thin client, developers have to be aware of the back-end servers and how they could affect the operation and power envelope for that thin client.<br /><br />
<h2 class="sectionHeading">Follow Best Practices for Creating Energy-efficient Client Device Applications</h2>
From an application developer’s point of view, a key tactic for achieving energy-efficient software performance is effective handling of sleep state transitions. A few general rules can go a long way toward accomplishing this goal—for example:<br /><br />
<ul>
<li>Design applications that allow screens to darken and disks to idle by avoiding behaviors that unnecessarily prevent systems from remaining in a sleep state. Moving from sleep states to full activity states requires some energy, thus, develop algorithms to not keep waking idle processors unnecessarily.</li>
<li>Where possible, eliminate code that keeps processors from transitioning to sleep states.</li>
<li>Employ development frameworks that allow an app to be respectful of sleep status and resilient in handling nonessential workloads.</li>
<li>To prevent users from disabling sleep, become more context aware, and take steps to ensure that systems don’t enter sleep states when users are passively interacting with them (e.g., watching or listening).</li>
<li>Develop power-aware strategies for handling timers and looping. Investigate the use of compiler switches that unroll deterministic loops, and make other adjustments that reduce the overall number of instructions executed (e.g., remove polling).</li>
<li>Use energy-aware tools to identify patterns of processor use in your apps.</li>
</ul>
A well-designed app should have little impact on overall energy consumption when it is open but idle, as Figure 1 shows.<br /><br />
<p ><img src="http://software.intel.com/file/43251" /></p>
<br /><b>Figure 1.</b> A key energy management principle: Idle apps should have negligible impact on power use.<br /><br />
<h2 class="sectionHeading">Tools And Techniques for Evaluating and Optimizing Application Energy Consumption Performance</h2>
Unlike many types of optimization, developers can’t see or infer symptoms of poor application energy performance. To make real progress toward improved client-side application energy efficiency, you need to employ power performance optimization tools and techniques. Figure 2 shows the results for 15 applications in a study. The chart shows two things: the average power over baseline (in Watts) and the percentage impact of that power draw over baseline. For example, Instant Messenger-4 running at idle caused the platform power draw to increase to 1.7 Watts, or 21 percent higher than system idle without the application running. This idle power draw affected battery life by approximately 4 hours. The conclusion from this study is that applications within the same category can exhibit different idle power behaviors.<br /><br />
<p ><img src="http://software.intel.com/file/43252" /></p>
<br /><b>Figure 2.</b> Analyzing app power performance behaviors “in the wild” can be complex.<br /><br />Imbuing client-side applications with power awareness isn’t difficult, but it is something that must be done with deliberate intention. For app developers, this is a matter of finding and using frameworks and instrumentation that help validate good designs and discover the flaws in program logic that need remediation.<br /><br /><b><i>Intel® Energy Checker</i></b><br /><br />The Intel® Energy Checker software development kit (SDK) provides developers with a way to analyze how applications consume power. This information is key to optimization, because gross power usage is far from being the whole story. Real efficiency demands an understanding of exactly how an app’s power consumption relates to its work output. For example, power sinks can be the result of poorly integrated legacy code, duplication of effort in libraries and components, frivolous output activities, and the like.<br /><br />Finding app behaviors that waste energy can be as challenging as finding memory leaks and other sublethal application flaws. Symptoms can be so subtle that it’s impossible to diagnose problems without instrumented code and a controlled, self-documenting test environment. Fortunately, this is precisely what Intel® Energy Checker provides. This SDK allows developers to:<br /><br />
<ul>
<li>Evaluate app productivity versus power consumption</li>
<li>Instrument code to report specific metrics about operations performed, timings, and collateral conditions</li>
<li>Generate large performance data sets using a variety of execution regimes</li>
<li>Evaluate the power consumption impacts of alternative libraries, drivers, and frameworks</li>
<li>Validate optimizations and remediation</li>
<li>Instrument apps in ways that allow customers and third-party testers to certify apps as energy efficient</li>
</ul>
<i><b>What Intel® Energy Checker Offers Client App Developers</b></i><br /><br />The Intel® Energy Checker SDK is a full-featured testing and validation facility. Its fundamental layer comprises a counter application programming interface (API) that allows direct measurement of app productivity. The ability to export and import counters provides a mechanism for analyzing how efficiently apps work with one another and the system overall.<br /><br />Intel® Energy Checker’s companion build and scripting tools allow a means of analyzing code for which source is not available or can’t practically be built with inline instrumentation. Command-line utilities allow Intel® Energy Checker tools and data streams to interoperate with native Windows* and Linux* counters and utilities, making Oracle* Solaris 10–, Mac OS X*–, and Linux* MeeGo-based apps susceptible to evaluation by Intel® Energy Checker testing and validation.<br /><br />One of the biggest advantages the Intel® Energy Checker toolset offers is its support for a broad variety of application development regimes. To help developers get up to speed with their projects, the SDK shipped with sample applets demonstrating how to employ it in the following situations:<br /><br />
<ul>
<li>With threading</li>
<li>Called from Java*</li>
<li>Called from C#</li>
<li>Called from Objective-C</li>
<li>With Linux system information utilities</li>
<li>CPU use histogram generator tools</li>
<li>Cluster energy efficiency</li>
<li>PL sampling measurements</li>
</ul>
The suite supports a majority of the common application programming languages in use today, including C, C++, C#, Objective-C, Java*, PHP, and Perl.<br /><br /><i><b>Using Microsoft Joulemeter to Analyze Energy Efficiency Performance</b></i><br /><br />Joulemeter from Microsoft* Research is focused on creating modeling and optimization tools to assist system architects, administrators, and developers in improving the energy efficiency of computing infrastructures. The central concentrations of the Joulemeter Research Program are on modeling and optimizing power use by computational infrastructure of all types and scales. This information is critical, because to achieve real energy savings, systems have to be optimized from end to end. Even lightweight mobile clients have to be aware of the impacts of their behavior on back-end servers, such as whether they will affect the operation’s overall power performance.<br /><br />The Joulemeter Research Project has published the lightweight stand-alone Joulemeter application* for Windows* 7 laptops and desktops. The app estimates the power consumption of a single computer by tracking resource usage (CPU saturation, screen backlighting, antenna power use, and the like); from these measurements, Joulemeter forecasts system power consumption.<br /><br /><i><b>Intel® Battery Life Analyzer</b></i><br /><br />The Intel® Battery Life Analyzer (BLA) is a lightweight tool that monitors battery life on computers running the Windows* operating system. Empirically evaluating energy-related application performance on battery-powered systems can sometimes yield impressive gains with relatively minor changes in application code. BLA helps developers identify opportunities to create “application idle” state converge on platform idle states. In particular, BLA gets around a problem from which most power management and accounting application programming interfaces (APIs) suffer. Inherently, accounting APIs have to work with sampled data, recorded at timer tick intervals (on the order of 15.6 msec). Therefore, if a software operation starts on a timer tick but ends before the next tick, it can’t be detected by metrics that use full tick granularity.<br /><br />Although this sounds like a negligible shortcoming, it isn’t. Many isochronous operations (think media handling) fall into this category, and such operations can easily become huge fractions of a platform’s overall workload. In contrast, BLA uses fine-grained process information based on microsecond scale time stamps. BLA records both a given activity’s starts and stops. This precision provides not only a more accurate picture of power utilization; it is also a far more complete one. (For a rigorous treatment of this topic, you can find a link to the Intel white paper, “Energy Efficient Platforms—Considerations for Application Software and Services,” in the Helpful Links section.)<br /><br />
<h2 class="sectionHeading">Mobile Device Battery Life Conservation</h2>
More and more, batteries are a key source of power for computing platforms. In early 2011, smart phones outsold PCs 4 to 1 worldwide. Given this, expect to see the energy efficiency of mobile apps become a key concern for all types of software consumers. Fortunately, mobile developers are generally pretty savvy about energy efficiency, as battery-operated devices have always demanded that discipline of them.<br /><br />All mobile development frameworks include methods for detecting power states (connected to AC wall current or running on DC battery power), testing battery levels, and scaling system and application behaviors in response to energy regimes. Apple*, Symbian*, Microsoft*, RIM*, and other mobile device vendors have worked over the years to establish general guidelines that help app developers be good power-management citizens on small devices. Many of these rules translate easily to laptop and desktop apps that are being reworked to improve power performance:<br /><br />
<ul>
<li>Replace timer-based designs with event-driven or interrupt-driven logic.</li>
<li>Avoid using timers as a high-resolution time source. If there is no workable alternative, ensure that timer resolution is reset to the system default when it is not actively engaged in its specific task.</li>
<li>Apps designed to provide passive display of content should explicitly increase display dimming timeout to accommodate playback using power request or availability APIs. The requests should be explicitly rescinded when the app is minimized or inactive.</li>
<li>Screen savers and the like should not alter dimming timeouts. Unless there is an aesthetic reason for them, screen savers do nothing to maintain the health of LCD monitors and are simply wasting energy. Let screens dim, if practical.</li>
</ul>
Ineffective management of sleep states can dramatically multiply an app’s power consumption. Effective use of parallelization, coalescing tasks that are difficult to parallelize in a single thread, and avoidance of excessive requirement for synchronization among threads are all strategies that can help reduce the number of sleep state transitions an app triggers (see Figure 3).<br /><br />
<p ><img src="http://software.intel.com/file/43253" /></p>
<br /><b>Figure 3.</b> Effective management of sleep states is key to good app energy performance.<br /><br />
<h2 class="sectionHeading">Conclusion</h2>
Managing the energy performance of application software may reasonably be expected to become a core competency for developers in the fairly near term, as economic and environmental considerations shape thinking on software engineering best practices. Many good tools exist for this purpose, and the Intel® Energy Checker SDK can help to validate and refine energy-optimization efforts of client software developers targeting both the desktop and mobile platforms.<br /><br />
<h2 class="sectionHeading">Helpful Links and Additional information on Power Management Tools and Resources</h2>
<ul>
<li><a target="_blank" href="http://www.climatesaverscomputing.org/resources/information/software-development">Software development information from Climate Savers Computing</a>*</li>
<li><a href="http://software.intel.com/en-us/articles/intel-energy-checker-sdk/#FAQ">Intel® Energy Checker SDK and user guide</a></li>
<li><a target="_blank" href="http://www.thegreengrid.org/about-the-green-grid.aspx">Learn more about The Green Grid</a>*</li>
<li><a target="_blank" href="http://msdn.microsoft.com/en-us/library/windows/desktop/aa373163(v=vs.85).aspx">Microsoft Power Management Functions* reference</a></li>
<li><a target="_blank" href="http://docs.redhat.com/docs/en-US/Red_Hat_Enterprise_Linux/6/html-single/Power_Management_Guide/index.html">Red Hat Linux 6 Power Management Guide</a>*</li>
<li><a target="_blank" href="http://www.elinux.org/Power_Management">Power Management for Linux</a>*</li>
<li>Fine-Grained Energy Profiling for Power-Aware Application Design: <a target="_blank" href="http://research.microsoft.com/apps/pubs/default.aspx?id=73662">http://research.microsoft.com/apps/pubs/default.aspx?id=73662</a>*</li>
<li>Intel white paper: “Energy Efficient Platforms—Considerations for Application Software and Services” (<a href="http://www.intel.com/content/www/us/en/green-it/energy-efficiency/energy-efficient-platforms-2011-white-paper.html?wapkw=considerations+for+application+software+and+services">http://www.intel.com/content/www/us/en/green-it/energy-efficiency/energy-efficient-platforms-2011-white-paper.html?wapkw=considerations+for+application+software+and+services</a>)</li>
<li>BLA requests, questions, and feedback: <a href="http://software.intel.commailto:BatteryLifeAnalyzer@intel.com">BatteryLifeAnalyzer@intel.com</a></li>
</ul>
<h2 class="sectionHeading">About the Author</h2>
Nancy Nicolaisen is an author, researcher, and veteran software developer specializing in mobile and embedded device technologies. Her feature articles, columns, and analyses have been internationally circulated in publications such as <i>BYTE, PC Magazine, Windows Sources, Computer Shopper, Dr. Dobbs Journal of Software Engineering, and Microsoft Systems Journal</i>. She is the author of three books—<i>Making Windows Portable: Porting Win32 to Win CE</i> (2002, John Wiley &amp; Sons); <i>The Practical Guide to Debugging 32 Bit Windows Applications</i> (1996, McGraw Hill); and <i>The Visual Guide to Visual C++</i> (1994, Ventana Press)—available in five foreign-language editions. In 2007, she served as technical advisor for the development of the Microsoft Professional Education course “Designing, Building and Managing Wireless Networks.” Ms. Nicolaisen is currently active in exploring open source technologies and trends for mobile, embedded, and wireless devices.<br /><br /> ]]></description>
      <link>http://software.intel.com/en-us/articles/designing-application-software-for-energy-efficient-performance/</link>
      <pubDate>Mon, 09 Apr 2012 00:00:00 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/designing-application-software-for-energy-efficient-performance/#comments</comments>
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      <category>Parallel Programming</category>
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      <category>Power Efficiency</category>
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    </item>
    <item>
      <title>Profiling Windows Service</title>
      <description><![CDATA[ <p>Intel® VTune<sup>TM</sup> Amplifier XE has a limited ability to profile Windows* services. However it is possible using a workaround that is described in this article.<br /><br />There is no problem if Hardware Event-Based Sampling analysis is used (e.g. Lightweight Hotspots). You just need to run the analyzed service from the same user account that is used to run VTune Amplifier XE. Then you can simply attach the profiler to the service process.<br /><br />When user-mode analysis is used, it comes a little bit tricky. The problem here is that VTune Amplifier XE adds binary instrumentation to analyzed processes. Windows* tries to limit such insertions for security reasons. Recent versions of Windows (starting with Vista*) have a separate session for services - session 0. User applications run in other sessions where users are logged in: session 1 to N. You can read more about <a href="http://windowsteamblog.com/windows/b/developers/archive/2009/10/01/session-0-isolation.aspx">session 0 isolation</a>.<br /><br />Since VTune Amplifier XE runs in a normal logon session and the service of interest runs in session 0, there appears a barrier for binary instrumentation and profiling.<br /><br />This barrier can be worked around by using PsExec utility. It can be downloaded <a href="http://technet.microsoft.com/en-us/sysinternals/bb897553">here</a>. Download and extract the archive, then put psexec.exe into your current working directory, or configure the PATH environment variable to include it.<br /><br /><strong>Steps to profile Windows service in CLI mode</strong><br />1. Configure analyzed service to run with permissions of current user<br />2. Run &lt;amplifier_xe_install_dir&gt;/amplxe-vars.bat to configure VTune Amplifier XE environment<br />3. Get PID of analyzed service<br />4. Run the following command to attach to the service and start collection (for Hotspots analysis):</p>
<p>&gt; psexec -i 0 amplxe-cl.exe -c=hotspots -r \path\for\your\result_dir --target-pid=PID</p>
<p>5. Run your workload<br />6. Detach VTune Amplifier XE from the service:</p>
<p>&gt; psexec -i 0 amplxe-cl.exe -command detach -r \path\for\your\result_dir</p>
<p>7. Open the collected results in VTune Amplifier XE GUI<br /><br /><strong>Steps to profile Windows service in GUI mode</strong><br />1. Configure analyzed service to run with permissions of current user<br />2. Run &lt;amplifier_xe_install_dir&gt;/amplxe-vars.bat to configure VTune Amplifier XE environment<br />3. Get PID of analyzed service<br />4. Start the Interactive Services service:</p>
<p>&gt; net start UI0Detect</p>
<p>5. Start VTune Amplifier XE GUI (from command line):</p>
<p>&gt; psexec -i 0 amplxe-gui.exe</p>
<p>6. You will get a blinking task bar icon. Click on that icon and an interactive Services Detection dialog box will pop up. Choose "View the message", that will make Windows change to session 0, which normally does not have any UI elements. But in this session 0 you should see the VTune Amplifier XE GUI, and another dialog box that you can use to get back to your normal logon session.<br /><br />7. Attach to the services process and use the VTune Amplifier XE GUI as you are used to.<br /><br />8. After you are done profiling, you can analyze the results in that session. Or close the VTune Amplifier XE GUI and click "Return now" in the dialog box. Then you can reopen the VTune Amplifier XE results in the normal logon session. <br /><br />9. Stop the Interactive Services service:</p>
<p>&gt; net stop UI0Detect<br /><br /><strong>Some other hints to profiling in session 0<br /></strong>• You can always go back and forth between session 0 and your normal logon session by selecting the "View the message" and "Return now" buttons in the Interactive services dialog boxes.</p>
<p>• Note that other users on the same machine might see the Interactive Services Detection window as well. Make sure they know about this, so they leave the dialog box alone.</p>
<p>• You can run VTune Amplifier XE as a different user than the service process. For this use "-u" parameter of psexec to specify the user under which the service is running. You will be prompted to type the password for the account:</p>
<p>&gt; psexec -u mydomain\myaccount -h -i 0 amplxe-gui.exe</p>
<p> <br />*Other names and brands may be claimed as the property of others.</p> ]]></description>
      <link>http://software.intel.com/en-us/articles/profiling-windows-service/</link>
      <pubDate>Sat, 24 Mar 2012 13:00:00 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/profiling-windows-service/#comments</comments>
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      <category>Tools</category>
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      <title>System Development for embedded Linux* OS running on Intel(R) Atom(TM) Processor</title>
      <description><![CDATA[ <p><b>Abstract</b></p>
<p>Developing and validating embedded software stack stability and peripheral device interfaces for System-on-Chip (SoC) designs gets ever more challenging. Driving factor is the increased level of device integration and need of timely and synchronized messaging.  Additionally driving this is a fragmented and specialized software and operating system ecosystem, as well as increased time-to-market pressure. In this article we will examine how software tools can help developer productivity by using specialized development and validation technologies. Furthermore we will examine key development, analysis and debug use cases as required with most common types of embedded Intel architecture platforms.</p>
<p><b>Introduction</b></p>
<p>Over the past several years we have seen the traditional embedded market segment experience a transformation from fixed function and isolated embedded systems to a new category of intelligent systems. The transformation is changing the way people engage with and experience computing. Implications from this shift are that devices are more capable and interact with each other and these usage models demand greater performance, an increasingly capable cloud of services, and software technology and tools that support these new classes of devices. These devices are secure, connected and managed. Several industry analyst firms such as IDC* and others are seeing this shift and have created a new embedded sub-category called "Intelligent Systems". The increased usage of system-on-chip (SoC) designs in traditional embedded market segments as well as the new category of Intelligent Systems requires the developer as well as tools vendor a like to reassess the entire development process from design, code generation and debug to system performance analysis.</p>
<p>When developing the system software stack for embedded devices you are frequently confronted with the question how to set up the most appropriate development environment first. It helps to understand the options for approaching software development targeting embedded systems. In this article we will focus on SoC designs using an application processor based on x86 or Intel architecture. The target application processor architecture being similar to the architecture of the system most likely used by the developer for his or her development work has some unique advantages and widens the choices available.</p>
<p>These choices range from traditional native development of applications on the development host for later deployment on a target device to full blown traditional embedded cross development using a QEMU* based virtual machine, a remote debug connection to a physical target device and a sysroot or chroot based build environment. We will attempt in this article to shed some light on each of these options for Intel® Atom<sup>TM</sup> Processor targeted designs.</p>
<p>One of the most commonly used operating system for Intel architecture based embedded systems is a customized flavor of Linux*. These may range from something based mainstream Linux* distributions to custom builds from scratch. Linux distributions specialized on embedded and mobile computing applications like Wind River* Linux*, Yocto Project*, or Android*, are playing a more and more prominent role. Frequently embedded designs have a real-time requirement for at least parts of the software stack. This implies that isolating those components of the software stack that have this requirement and ensuring that they do have only minimal dependencies on the non real-time part of the software stack becomes one key challenge of developing and defining embedded systems software.</p>
<p>Furthermore, when talking about SoCs, understanding the interaction between all the platform components becomes vitally important. You may be developing device drivers that take advantage of special GPU features or use micro-engines and other hardware accelerators found on the platform. You may be designing the software interface for the many wireless radios found in today's small form factor devices. In either scenario, being able to analyze the message timing - making sure the variable values that are exchanged between the different platform components contain the right value at the right time, becomes important for platform software stack stability. Being able to access device configuration registers easily and in a comprehensive manner also simplifies developing device drivers and controlling platform component interaction timings.</p>
<p> </p> ]]></description>
      <link>http://software.intel.com/en-us/articles/system-development-for-embedded-linux-os-running-on-intelr-atomtm-processor/</link>
      <pubDate>Sat, 17 Mar 2012 00:00:00 -0700</pubDate>
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      <title>Using Intel Cluster Checker to check that MPI applications will properly run over InfiniBand</title>
      <description><![CDATA[ <p class="MsoNormal">One of the benefits of Intel Cluster Checker is that it acts as an application proxy. If the tool passed, then there is a high probability of an MPI application running properly.<o:p></o:p></p>
<p class="MsoNormal">To ensure this, the following exhaustive steps are enforced by Intel Cluster Checker test modules:<o:p></o:p></p>
<p class="MsoListParagraphCxSpFirst" > </p>
<ol>
<li><span >·<span > </span></span><span >Check that base libraries and their uniformity (<b>base_libraries</b>)</span></li>
<li><span >·<span > </span></span><span >Check that MPI tools have consistent paths (<b>mpi_consistency</b>)</span></li>
<li><span >·<span > </span></span><span >Check that per-node MPI jobs can do Hello World independently (<b>intel_mpi_rt</b>)</span></li>
<li><span >·<span > </span></span><span >Check that a global Hello World is successfully executed across compute nodes (<b>intel_mpi_rt_internode</b>)</span></li>
<li><span >·<span > </span></span><span >Runs Intel MPI Benchmarks such as Ping Pong to check available latency and bandwidth (<b>imb_pingpong_intel_mpi</b>)</span></li>
<li><span >·<span > </span></span><span >Stress the communication system by running the HPCC benchmark (<b>hpcc</b>)</span></li>
</ol>&lt;!--[if !supportLists]--&gt;<o:p></o:p>
<p> </p>
<p class="MsoListParagraphCxSpMiddle" ><o:p></o:p></p>
<p class="MsoListParagraphCxSpMiddle" ><o:p></o:p></p>
<p class="MsoListParagraphCxSpMiddle" ><o:p></o:p></p>
<p class="MsoListParagraphCxSpMiddle" ><o:p></o:p></p>
<p class="MsoListParagraphCxSpLast" ><o:p></o:p></p>
<p class="MsoNormal">If the tool reports something, then an MPI application might have issues to complete their work.<o:p></o:p></p>
<p class="MsoNormal">These steps will even catch potential timeouts due wrong configuration on the network stack; and most important, bad cabling or down hardware interfaces. However, if the cluster uses InfiniBand adapters then there is a known issue to be aware of. The global MPI check can hang as any other MPI application will do if InfiniBand is not correctly configured and online.<o:p></o:p></p>
<blockquote>
<p class="MsoNormal"><span >Intel(R) MPI Library Runtime Environment (All nodes), (intel_mpi_rt_internode, 1.8.....................................................</span><span >^C</span></p>
<p class="MsoNormal"><span >Caught signal INT, cleaning before termination.<o:p></o:p></span></p>
</blockquote>
<p class="MsoNormal">With InfiniBand setups, the configuration of Intel Cluster Checker must define openib and dat_conf as dependencies of intel_mpi_rt_internode. This action will ensure that the InfiniBand devices are properly detected and healthy. openib check hardware devices, and dat_conf the DAPL software interface.<o:p></o:p></p>
<blockquote>
<p class="MsoNormal">&lt;intel_mpi_rt_internode&gt;<o:p></o:p></p>
<p class="MsoNormal">&lt;add_dependency&gt;dat_conf&lt;/add_dependency&gt;<o:p></o:p></p>
<p class="MsoNormal">&lt;add_dependency&gt;openib&lt;/add_dependency&gt;<o:p></o:p></p>
<p class="MsoNormal">&lt;/intel_mpi_rt_internode&gt;<o:p></o:p></p>
</blockquote>
<p class="MsoNormal">This decision cannot be done automatically as choosing were to use or not the low latency, high bandwidth capabilities of InfiniBand during the check is at discretion of the user. For instance, the administrator may want to double check that an Ethernet fabric can be properly used to run MPI applications.<o:p></o:p></p>
<p class="MsoNormal">Be aware that this manual requirement may be lifted in the near future.<o:p></o:p></p> ]]></description>
      <link>http://software.intel.com/en-us/articles/using-intel-cluster-checker-to-check-that-mpi-applications-will-properly-run-over-infiniband/</link>
      <pubDate>Tue, 07 Feb 2012 00:00:00 -0800</pubDate>
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      <category>Parallel Programming</category>
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    <item>
      <title>Ultrabook™ and the Intel® Energy Checker SDK</title>
      <description><![CDATA[ <h2 class="sectionHeading">Abstract</h2>
With the advent of the Ultrabook™<sup>1</sup>, the demand for applications that are power misers continues to rise. The Intel® Energy Checker SDK can be used to instrument an application and collect data to help a developer pinpoint power hungry features that can be optimized for power. This article gives an overview of the Intel Energy Checker SDK and discusses how it can be used to advantage when improving energy usage on an Ultrabook.<br /><br />
<h2 class="sectionHeading">More Work, Less Power</h2>
An Ultrabook™ needs to budget its power consumption very carefully to extend usefulness while running on battery. Therefore, applications that use less energy are preferred. Often, application developers create their program on a desktop system where power/energy consumption is less important than raw performance. Not only should applications be developed to conserve power when active, they should also be developed to minimize energy usage during program idle periods, this is often overlooked and can greatly extend battery life. If power issues are ignored, running a program on an Ultrabook will result in unpleasant surprises for the user. If developers test their application on an Ultrabook system during development, they will gain insight into how well the program runs in a power limited environment. An analysis tool such as the <a href="http://software.intel.com/en-us/articles/intel-energy-checker-sdk/">Intel® Energy Checker SDK</a> can be a powerful companion during the optimization phase for software designed for an Ultrabook.<br /><br />
<h2 class="sectionHeading">Energy Efficency</h2>
Before explaining what Intel Energy Checker SDK contains, a discussion on Energy Efficiency (EE) is in order. This is a term that is used extensively in the Intel Energy Checker SDK. There is no universally accepted definition of EE, so for the purposes of this tool it is defined as:<br />
<p ><em>EE=Work/Energy</em></p>
<em>Work</em> is defined as the amount of “<em>useful work</em>” done by a software application. There is no concise, easy definition of the term <em>useful work</em> either, as what is considered <em>useful work</em> in one program may be quite different in another application. The developer is required to make that determination. For example, one might consider the areas of a movie player program where it provides the customer value (such as decoding the movie) as useful work whereas areas of the program that are accessing resources, waiting on input, or performing synchronization would not.<br /><br />
<h2 class="sectionHeading">Code Instrumentation</h2>
The first step in using Intel Energy Checker SDK to help determine an application’s EE is to create and use “counters” in the software to determine quantities of “useful work”. A counter is defined as a 64-bit (8 byte) variable that keeps a running total of how many times a particular event occurs. In the “C” language, this becomes an unsigned long long data type. A developer can create one or more counters during the initialization portion of the software. Next, a container for the counters can be created, called a “Productivity Link” (PL)<sup>2</sup>. Each PL holds up to 512 counters, and up to 10 different PL’s can be open at one time, but most software will require far smaller numbers of counters and PL’s.<br /><br />During the application runtime, values can be written to any counter in the PL, based on the developer’s requirements. Intel Energy Checker SDK can collect the information from the PL’s in order to determine how much work was done.<br /><br />
<h2 class="sectionHeading">Energy Consumed</h2>
The second part of finding the EE of a software application is to measure how much energy was consumed while the program was running. To do this, Intel Energy Checker SDK uses two tools which are included in the SDK download: Energy Server (ESRV) and Temperature Server (TSRV). ESRV is used to monitor energy and power consumption as reported by external power tools while TSRV monitors temperature related information as reported by environmental probes. ESRV and TSRV counters can be accessed by any program using the Intel Energy Checker API. In addition to the counters created by the developer to determine quantities of work, the developer will want to add counters to collect information from ESRV and possibly TSRV. There are three different ways to set up ESRV:<br /><br /><ol>
<li>Use a power meter to collect actual “platform energy and power” information.<br /><br />There are several different power meters that work with the Intel Energy Checker SDK. Please consult the <em>Intel® Energy Checker SDK User Guide</em> included in the download or found on the <a href="http://software.intel.com/en-us/articles/intel-energy-checker-sdk/">Intel® Energy Checker SDK page</a> to determine which power meters will work and how they should be attached to the test system.<br /></li>
<li>Use <a href="http://software.intel.com/en-us/articles/intel-power-gadget/">Intel® Power Gadget</a> to collect “processor energy and power” usage information on 2nd Generation Intel Core™ processor family. External power meters can also be used which report platform power together with Intel Power Gadget that provides processor power.The blog Accessing Intel® Power Gadget From Intel® Energy Checker SDK by Intel engineer Jun De Vega discusses how to enable Intel® Power Gadget with Intel® Energy Checker.<br /></li>
<li>Choose to use the simulation method which will use the CPU utilization percentage returned from the OS. This method does not require a hardware probe. The Intel Energy Checker SDK offers this method as an option for all processors (rather than just the 2nd Generation Intel Core processor family as with the Intel Power Gadget) in order for enable the user who does not have a power meter. Included in the SDK is a support library for accessing this metric.</li>
</ol>
<p ><img src="http://software.intel.com/file/41168" /><br /><br /><strong>Figure 1:</strong> Conceptualized drawing of Intel Energy Checker setup with Instrumented Application, Power Meter and Environmental probes attached</p>
<h2 class="sectionHeading">Intel Energy Checker Extras</h2>
There are two companion tools that are bundled with the Intel Energy Checker SDK in addition to those already mentioned. The PL GUI Monitor is a user interface that displays Productivity Link (PL) counters in a running program that has already been instrumented with the Intel Energy Checker API. The PL CSV Logger<sup>3</sup> is an application that can collect and write PL counters to a CSV file for later analysis in a variety of spreadsheet applications.<br /><br />Included with the Intel Energy Checker SDK is the <em>Intel® Energy Checker SDK Companion Application User Guide</em> that discusses the features and capabilities of both of these tools.<br /><br />
<p ><img src="http://software.intel.com/file/41169" /><br /><br /><strong>Figure 2:</strong> PL GUI Monitor running while a picture is being rendered</p>
The entire Intel Energy Checker SDK includes other build, scripting, interoperability, and monitoring tools to help developers instrument code and collect energy metrics.<br /><br />A white paper entitled “<em>How Green Is Your Software?</em>” is available for download from the SDK site. This paper discusses approaches for making software power efficient. Look for it in the “Code, Resources and Documentation” section of the <a href="http://software.intel.com/en-us/articles/intel-energy-checker-sdk/">Intel Energy Checker SDK page</a>. Several blogs about Intel Energy Checker that were written by Intel Engineer Jamel Tayeb will also be helpful:<br /><br /><a href="http://software.intel.com/en-us/blogs/2010/04/15/using-the-intel-energy-checker-sdk-at-home/?wapkw=(Energy+Checker)">Using the Intel® Energy Checker SDK at Home</a><br /><br /><a href="http://software.intel.com/en-us/blogs/2010/02/19/creating-a-simple-device-library-for-intel-energy-checker-sdk/?wapkw=(Energy+Checker)">Creating a Simple Device Library for Intel® Energy Checker SDK</a><br /><br /><a href="http://software.intel.com/en-us/blogs/2010/03/30/measuring-the-energy-consumed-by-a-command-using-the-intel-energy-checker-sdk/?wapkw=(Energy+Checker)">Measuring the energy consumed by a command using the Intel® Energy Checker SDK</a><br /><br />All of these resources allow a developer to get started in gathering helpful information.<br /><br />
<h2 class="sectionHeading">Optimizing Applications for Ultrabooks</h2>
Once a program has been instrumented to collect counter information and an energy collection plan is in place (either simulation or power meter), the setup is complete. The developer will then be able to gather information about the application’s energy usage profile and to incorporate optimizations to improve results.<br /><br />There are several areas of optimization the Ultrabook developer can select for improvements:<br /><br />
<div >Consider modifying the application to be aware of the power status and changing usage to reduce energy consumption when the system is on battery.<br /><br />Check the hardware and software system power management possibilities to choose a balanced power setting. This could be a recommended setting suggested in application documentation.<br /><br />Reduce power usage while the application is actively running or doing work. Compute intensive parts of the program will likely benefit from multi-threading and vectorization techniques.<br /><br />Reduce power usage while the application is idle. Being able to minimize the timer tick rate or setting up periodic actions to happen within the same wakeup period are examples of how to reduce idle application power usage.</div>
<br /><br />
<h2 class="sectionHeading">Summary</h2>
With the growth of Ultrabook devices, it will benefit program designers and developers to take a look at ways to save energy while providing a great user experience on an Ultrabook. Intel Energy Checker SDK can provide the means to identify the key areas of focus and confirm the positive results achieved after optimization. Long live Ultrabook!<br /><br />
<h2 class="sectionHeading">About the Author</h2>
<img src="http://software.intel.com/file/41170"  /> Judy Hartley is a Software Applications Engineer who has been working in the Software and Services Group since 2005. She has contributed to many software products and written about her experiences through blogs and whitepapers. Recently Judy has been working on Graphics and Power tools and training for future Intel processors.<br /><br  />
<hr />
<br /><sup>1</sup> Ultrabook is a trademark of Intel Corporation in the U.S. and/or other countries.<br /><br /><sup>2</sup> A Productivity Link is a term used by Intel Energy Checker to represent an arbitrary or logical collection of counters.<br /><br /><sup>3</sup> CSV is the acronym for Comma Separated Values.<br /><br /> ]]></description>
      <link>http://software.intel.com/en-us/articles/ultrabook-and-the-intel-energy-checker-sdk/</link>
      <pubDate>Tue, 24 Jan 2012 00:00:00 -0800</pubDate>
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    </item>
    <item>
      <title>How to Automate Static Security Analysis with Intel(R) C++ Compiler for Linux*</title>
      <description><![CDATA[ <p>Automate the static security analysis check done by the Intel(R) C++ Compiler for Linux. Static security analysis is the process of finding errors and security weaknesses in software through detailed analysis of source code.<br /><br />An automated quality gate like this one can notably reduce code reviews efforts, and of course will decrease the likely of having bugs and security threats found once the product is in production. <br /><br />To automate the static security analysis as a quality gate in any project, execute the check without graphical user interface which requires human interaction.</p>
<p> </p>
<p>In the case of legacy projects, ask the developers to submit new code only if they reduce the number of findings.<br />In the case of coding from scratch, allow no findings before uploading new code in your repository.<br /><br />When enabling the check (<strong>-diag-enable sc3</strong>) and compiling the code, a new folder will be created where the findings will be stored using a custom XML format.</p>
<blockquote>
<p>$ file rXsc/data.X/rXsc.pdr<br />rXsc/data.X/rXsc.pdr: XML document text</p>
</blockquote>
<br />The xmlstar* package can be used to easily list the findings and the associated location information (file, line and function). The package provides a command line tool to process XML documents.<br /><br /><a href="http://xmlstar.sourceforge.net/">http://xmlstar.sourceforge.net</a><br /><br />The following line can be used to verify that no findings are found before proceeding with the usual development cycle. <br /><br />
<blockquote>
<p>$ xml sel -t -m /diags/diag -v "concat(message/thread/stacktrace/loc/file, ':', message/thread/stacktrace/loc/line, ':', sc_verbose)" -n rXsc/data.0/rXsc.pdr <br />/home/$USER/work/$PROD/src/pool.c:157:pool.c(157): warning #12178: this value of "ret" isn't used in the program<br />/home/$USER/work/$PROD/src/pool.c:186:pool.c(186): error #12192: unreachable statement<br />/home/$USER/work/$PROD/src/pool.c:216:pool.c(216): warning #12135: procedure "pool_done" is never caled</p>
</blockquote>
<p> </p> ]]></description>
      <link>http://software.intel.com/en-us/articles/how-to-automate-static-security-analysis-with-intelr-c-compiler-for-linux/</link>
      <pubDate>Fri, 13 Jan 2012 00:00:00 -0800</pubDate>
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      <category>Intel® C++ Compiler for Linux* Knowledge Base</category>
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    </item>
    <item>
      <title>VTune™ Amplifier XE collection warning: Symbol file is not found</title>
      <description><![CDATA[ The VTune™ Amplifier XE may display a warning about “Symbol file not found” during Hotspots, Concurrency, or Locks and Waits analysis.  For example:<br /><br />
<div></div>
<pre name="code" class="plain:nogutter:nocontrols">&gt;/opt/intel/vtune_amplifier_xe_2011/bin64/amplxe-cl -collect hotspots -r test1 – my_test_exe
Warning: Symbol file is not found. The call stack passing through the module [vdso] may be incorrect
Using result path `/home/vtsymbal/test1
Executing actions 75 % Generating a report                                     
Summary
-------
Elapsed Time:  6.354
CPU Time:      6.210
Executing actions 100 % done
 
</pre>
<br />The tool notifies that there is a module [vdso] that cannot be resolved for symbols (the brackets are used for that purpose) and therefore the call stack may be incorrect. In some cases it might be a [vsyscall] module. You may check  that the vdso module is in a dynamic dependency list:<br /><br />
<div>
<pre name="code" class="plain:nogutter:nocontrols">&gt;ldd -d my_test_exe
        linux-vdso.so.1 =&gt;  (0x00002aaaaaac6000)
        libtbb.so.2 =&gt; /opt/intel/tbb/tbb40_233oss/lib/libtbb.so.2 (0x00002aaaaabc7000)
        libstdc++.so.6 =&gt; /usr/intel/pkgs/gcc/4.5.2/lib64/libstdc++.so.6 (0x00002aaaaadf5000)
        libm.so.6 =&gt; /lib64/libm.so.6 (0x00002aaaab117000)
        libgcc_s.so.1 =&gt; /usr/intel/pkgs/gcc/4.5.2/lib64/libgcc_s.so.1 (0x00002aaaab26c000)
        libc.so.6 =&gt; /lib64/libc.so.6 (0x00002aaaab481000)
        librt.so.1 =&gt; /lib64/librt.so.1 (0x00002aaaab6c2000)
        libdl.so.2 =&gt; /lib64/libdl.so.2 (0x00002aaaab7cb000)
        libpthread.so.0 =&gt; /lib64/libpthread.so.0 (0x00002aaaab8cf000)
        /lib64/ld-linux-x86-64.so.2 (0x00002aaaaaaab000)
 
</pre>
<br />You can safely ignore this warning if you see a reference to the [vdso]. It means that the kernel dynamically made some temporary memory allocations by loading some executable code into memory space. The fact that VTune Amplifier XE throws this warning indicates that some Hotspot samples were taken when that code was running.  During post-processing time VTune Amplifier XE’s collector could not find the vdso anymore. The module linux-vdso.so.1 (linux-vsyscall.so.1 or linux-gate.so.1 on earlier Linux kernels) is a Virtual Dynamic Shared Object (VDSO),  which resides in the address space of the program. This is a virtual library which contains a complex logic that provides user applications with fast access to system functions depending on CPU microarchitecture – either through interrupt mechanism or though the fast system calls smechanism (most applicable for modern CPUs)  [1].
<div><br /></div>
<div>[1] <a href="http://docs.redhat.com/docs/en-US/Red_Hat_Enterprise_MRG/2/html/Realtime_Reference_Guide/sect-Realtime_Reference_Guide-System_calls-Virtual_dynamic_shared_object.html">Virtual dynamic shared object</a></div>
</div> ]]></description>
      <link>http://software.intel.com/en-us/articles/vtune-amplifier-xe-warning-symbol-file-is-not-found/</link>
      <pubDate>Sun, 16 Oct 2011 13:00:00 -0700</pubDate>
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      <category>Intel® VTune™ Amplifier XE Knowledge Base</category>
    </item>
    <item>
      <title>Intel Cluster Checker 1.8 Execution Time</title>
      <description><![CDATA[ <p>This article shows reference times for a full execution on different node counts, similar to the one required for Intel Cluster Ready architecture compliance. It is expected that a simple interpolation of the provided values will help to roughly estimate execution time during troubleshooting.<br /><br />The executed command line is shown below; it uses an almost empty configuration file, only having the node list file location. This configuration selects default values for all checks. MPI-related tests and benchmarks are executed over the best available messaging fabric.<br /><br />$ cluster-check config.xml --certification<br /><br />On a reference system the wall time was:<br /><br />64 nodes: 2097 seconds (about 0.58 hours)<br />128 nodes: 2825 seconds (about 0.78 hours)<br />256 nodes: 5655 seconds (about 1.57 hours)<br />320 nodes: 6915 seconds (about 1.92 hours)<br /><br /><img height="284" width="306" src="http://software.intel.com/file/39168" alt="walltime.png" title="walltime.png" /><br /><br />This complete check covers different tests: hardware and software uniformity, health and functional wellness behavior, individual node and cluster wide performance, etc. Check the <a href="http://software.intel.com/en-us/articles/intel-cluster-ready-document-library/">product documentation</a> to find out how to run a different set of test modules; in order to have a lighter or deeper coverage with a reduced or increased execution time, respectively.<br /><br />If your system has hundred of nodes check this <a href="http://software.intel.com/en-us/articles/running-intel-cluster-checker-in-big-clustered-systems/">article </a>for more details.<br />The details of the system used to gather reference data can be found <a href="http://software.intel.com/en-us/articles/performance-tools-for-software-developers-use-of-intel-mkl-in-hpcc-benchmark/?wapkw=(mkl+hpcc)">here</a>.<br /><br />Disclaimer: Results have been estimated based on internal Intel analysis and are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance.</p> ]]></description>
      <link>http://software.intel.com/en-us/articles/intel-cluster-checker-18-execution-time/</link>
      <pubDate>Sat, 08 Oct 2011 20:00:00 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/intel-cluster-checker-18-execution-time/#comments</comments>
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      <category>Software Products General</category>
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      <category>Intel® Cluster Checker Knowledge Base</category>
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    </item>
    <item>
      <title>Intel Architecture and Processor Identification With CPUID Model and Family Numbers</title>
      <description><![CDATA[ <p>This article is intended to aid software developers in understanding the "big picture" of Intel®'s recent architecture and processor releases. The <a href="http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html">"tick tock" model</a> adds predictability to <a href="http://www.intel.com/content/www/us/en/processors/public-roadmap-article.html">Intel®'s architecture roadmap</a>. However within each "tick" and "tock" architecture, multiple processors are launched to support the many diverse computing needs of consumers. While the general <a href="http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html">Instruction Set Architecture (ISA)</a> and feature set within a given architecture are identical, certain model specific variations occur, and are generally enumerated through CPUID interrogation<a href="http://software.intel.com#_ftn1">[1]</a>. The CPUID model number is a convenient way of anticipating the model specific functionality that is available at runtime and subsequently designing the architecture specific parts of software (nevertheless, at runtime, the feature bits in the CPUID should <i>always</i> be verified before use).</p>
<p>The information in the table below is composed from the <a href="http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html">"Intel® Processor Identification and the CPUID Instruction"</a> and the <a href="http://ark.intel.com/">official Intel® product information source</a>.</p>
<p>For identifying a particular processor, please use the <a href="http://www.intel.com/support/processors/tools/piu/sb/CS-014921.htm">Intel® Processor Identification Utility</a> for Microsoft® Windows<sup>TM</sup> operating systems or the <a href="http://www.intel.com/support/processors/tools/piu/sb/CS-015823.htm">bootable version</a> for other operating systems<a href="http://software.intel.com#_ftn2" name="_ftnref2">[2]</a>.</p>
<p> </p>
<p><b>Notes</b></p>
<ul>
<li>The -EP suffix denotes a Dual Processor, meaning this processor is designed to operate in a Dual Processor platform (but can still operate in a Single Processor platform). The -EX suffix denotes a Multi-Processor (MP), meaning this processor is designed to operate in a Multiprocessor platform, but can still operate in a Single or Dual processor platform configuration.</li>
<li>The Family number is an 8-bit number derived from the processor signature by adding the Extended Family number (bits 27:20) and the Family number (bits 11:8). See section 5.1.2.2 of the <a href="http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html">"Intel Processor Identification and the CPUID Instruction"</a>.</li>
<li>The Model number is an 8 bit number derived from the processor signature by shifting the Extended Model number (bits 19:16) 4 bits to the left and adding the Model number (bits 7:4) . See section 5.1.2.2 of the <a href="http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html">"Intel Processor Identification and the CPUID Instruction"</a>.</li>
</ul>
<b>
<p> </p>
<p><a href="http://software.intel.com#_mainline" name="_mainline" >Mainline Architectures and Processors</a></p>
<p><i>This table includes the mainline processors on 90nm and later process technology. Please read and understand these important <a href="http://software.intel.com#_disclaimers">disclaimers</a> prior to use.</i></p>

<div class="WordSection1">
<table width="812" cellpadding="0" cellspacing="0" border="0" class="MsoNormalTable" >
<tbody>
<tr >
<td width="75" >
<p align="center" class="MsoNormal" ><b><span >Process<br />Technology</span></b></p>
</td>
<td width="112" >
<p align="center" class="MsoNormal" ><b><span >Microarchitecture<br />Codename</span></b></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><b><span >Processor<br />Codename</span></b></p>
</td>
<td width="67" >
<p align="center" class="MsoNormal" ><b><span >Processor Signature</span></b></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><b><span >Family Number</span></b></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><b><span >Model Number</span></b></p>
</td>
<td width="148" >
<p align="center" class="MsoNormal" ><b><span >Intel® Brand <br />Name(s)</span></b></p>
</td>
<td width="182" >
<p align="center" class="MsoNormal" ><b><span >Intel® Brand <br />Processor Number</span></b></p>
</td>
</tr>
<tr >
<td width="75" >
<p class="MsoNormal" align="center" ><span >22 nm<o:p></o:p></span></p>
</td>
<td width="112" >
<p class="MsoNormal" align="center" ><span class="SpellE"><span >IvyBridge</span></span><span ><o:p></o:p></span></p>
</td>
<td width="103" >
<p class="MsoNormal" align="center" ><span class="SpellE"><span >IvyBridge</span></span><span ><o:p></o:p></span></p>
</td>
<td width="67" >
<p class="MsoNormal" align="center" ><span >0x306Ax<o:p></o:p></span></p>
</td>
<td width="60" rowspan="27" >
<p class="MsoNormal" align="center" ><span >0x06<o:p></o:p></span></p>
</td>
<td width="60" >
<p class="MsoNormal" align="center" ><span >0x3A<o:p></o:p></span></p>
</td>
<td width="161" >
<p class="MsoNormal"><span >Core™ i3<br /> Core™ i5<br /> Core™ i7<br /> Core™ i7 Extreme<br /> Xeon™ E3<o:p></o:p></span></p>
</td>
<td width="179" >
<p class="MsoNormal"><span >i3-31xx/32xx-T/U<br /> i5-3xxx-T/S/M/K/ME<br /> i7-3xxx-S/K/M/QM/LE/UE/QE<br /> i7-3920XM <br /> E3-12xxV2<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="75" rowspan="9" >
<p class="MsoNormal" align="center" ><span >32 nm</span></p>
</td>
<td width="112" rowspan="4" >
<p class="MsoNormal" align="center" ><span >SandyBridge</span></p>
</td>
<td width="103" >
<p class="MsoNormal" align="center" ><span >SandyBridge</span></p>
</td>
<td width="67" >
<p class="MsoNormal" align="center" ><span >0x206Ax</span></p>
</td>
<td width="60" >
<p class="MsoNormal" align="center" ><span >0x2A</span></p>
</td>
<td width="161" >
<p class="MsoNormal"><span >Core™ i3<br /> Core™ i5<br /> Core™ i7<br /> Core™ i7 Extreme<br /> Celeron™ Desktop<br /> Celeron™ Mobile<br /> Pentium™ Desktop<br /> Pentium™ Mobile<br /> Xeon™ E3</span></p>
</td>
<td width="179" >
<p class="MsoNormal"><span >i3-21xx/23xx-T/M/E/UE<br /> i5-23xx/24xx/25xx-T/S/M/K<br /> i7-2xxx-S/K/M/QM/LE/UE/QE<br /> i7-29xxXM <br /> G4xx, G5xx<br /> 8xx, B8xx<br /> 350, G6xx, G6xxT, G8xx<br /> 9xx, B9xx<br /> E3-12xx</span></p>
</td>
</tr>
<tr >
<td width="103" >
<p class="MsoNormal" align="center" ><span >SandyBridge-E<o:p></o:p></span></p>
</td>
<td width="67" rowspan="3" >
<p class="MsoNormal" align="center" ><span >0x206Dx<o:p></o:p></span></p>
</td>
<td width="60" rowspan="3" >
<p class="MsoNormal" align="center" ><span >0x2D<o:p></o:p></span></p>
</td>
<td width="161" >
<p class="MsoNormal"><span >Core™ i7<br /> Core™ i7 Extreme<o:p></o:p></span></p>
</td>
<td width="179" >
<p class="MsoNormal"><span >I7-3820/3930K<br /> i7-3960X<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="103" >
<p class="MsoNormal" align="center" ><span >SandyBridge-EN<o:p></o:p></span></p>
</td>
<td width="161" >
<p class="MsoNormal"><span >Xeon™ E5<o:p></o:p></span></p>
</td>
<td width="179" >
<p class="MsoNormal"><span >E5-24xx<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="103" >
<p class="MsoNormal" align="center" ><span >SandyBridge-EP<o:p></o:p></span></p>
</td>
<td width="161" >
<p class="MsoNormal"><span >Xeon™ E5<o:p></o:p></span></p>
</td>
<td width="179" >
<p class="MsoNormal"><span >E5-16xx, 26xx/L/W<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="112" rowspan="5" >
<p align="center" class="MsoNormal" ><span >Westmere</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Arrandale</span></p>
</td>
<td width="67" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x2065x</span></p>
</td>
<td width="60" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x25</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Celeron™ Mobile<br />Pentium™ Mobile<br />Core™ i3<br />Core™ i5<br />Core™ i7</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >P4xxx, U3xxx<br />P6xxx, U5xxx<br />i3-3xxE, i3-3xxM, i3-3xxUM<br />i5-4xxM/UM, i5-5xxE/M/UM<br />i7-6xxE/LE/UE/M/LM/UM</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Clarksdale</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Pentium™ Desktop<br />Core™ i3<br />Core™ i5<br />Xeon™ 3000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >G69xx<br />i3-5xx<br />i5-6xx, i5-6xxK<br />L34xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Gulftown</span></p>
</td>
<td width="67" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x206Cx</span></p>
</td>
<td width="60" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x2C</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ i7<br />Core™ i7 Extreme<br />Xeon™ 3000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >i7-9xx<br />i7-9xxX<br />W36xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Westmere-EP</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 3000<br />Xeon™ 5000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >W36xx<br />L56xx, E56xx, X56xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Westmere-EX</span></p>
</td>
<td width="67" >
<p align="center" class="MsoNormal" ><span >0x206Fx</span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x2F</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ E7</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >E7-2xxx, E7-48xx, E7-88xx</span></p>
</td>
</tr>
<tr >
<td width="75" rowspan="11" >
<p align="center" class="MsoNormal" ><span >45 nm</span></p>
</td>
<td width="112" rowspan="6" >
<p align="center" class="MsoNormal" ><span >Nehalem</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Clarksfield</span></p>
</td>
<td width="67" rowspan="3" >
<p align="center" class="MsoNormal" ><span >0x106Ex</span></p>
</td>
<td width="60" rowspan="3" >
<p align="center" class="MsoNormal" ><span >0x1E</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ i7<br />Core™ i7 Extreme</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >i7-7xxQM, i7-8xxQM<br />i7-9xxXM</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Lynnfield</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ i5<br />Core™ i7<br />Xeon™ 3000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >i5-7xx, i5-7xxS<br />i7-8xx, i7-8xxS, i7-8xxK<br />X34xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Jasper Forest</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 5000<br />Celeron™ Desktop</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >LC55xx, EC55xx<br />P10xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Bloomfield</span></p>
</td>
<td width="67" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x106Ax</span></p>
</td>
<td width="60" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x1A</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ i7 Extreme<br />Core™ i7<br />Xeon™ 3000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >i7-965/975<br />i7-9x0<br />W35xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Nehalem-EP</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 5000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >L55xx, E55xx, X55xx, W55xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Nehalem-EX</span></p>
</td>
<td width="67" >
<p align="center" class="MsoNormal" ><span >0x206Ex</span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x2E</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 7000<br />Xeon™ 6000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >L75xx, E75xx, X75xx<br />E65xx, X65xx</span></p>
</td>
</tr>
<tr >
<td width="112" rowspan="5" >
<p align="center" class="MsoNormal" ><span >Penryn</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Yorkfield</span></p>
</td>
<td width="67" rowspan="4" >
<p align="center" class="MsoNormal" ><span >0x1067x</span></p>
</td>
<td width="60" rowspan="4" >
<p align="center" class="MsoNormal" ><span >0x17</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ 2 Quad<br />Core™ 2 Extreme<br />Xeon™ 3000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >Q9xxx, Q8xxx, !9xxxS<br />QX9xxx<br />L33xx, <span class="baec5a81-e4d6-4674-97f3-e9220f0136c1" >X3350</span></span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Wolfdale</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Celeron™ Desktop<br />Core™ 2 Duo <br />Pentium™<br />Xeon™ 5000/3000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >E3xxx<br />E7xxx, E8xxx<br />E5xxx, E6xxx, E6xxxK<br />L52xx, E31xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Penryn</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ 2 Duo Mobile<br />Celeron™ M</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >P7xxx, P9xxx, SL9xxx<br />722</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Harpertown (DP)</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 5000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >L54xx, E54xx, X54xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Dunnington (MP)</span></p>
</td>
<td width="67" >
<p align="center" class="MsoNormal" ><span >0x106Dx</span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x1D</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 7000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >L74xx, E74xx, Q7xx</span></p>
</td>
</tr>
<tr >
<td width="75" rowspan="8" >
<p align="center" class="MsoNormal" ><span >65 nm</span></p>
</td>
<td width="112" rowspan="6" >
<p align="center" class="MsoNormal" ><span >Merom</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Clovertown</span></p>
</td>
<td width="67" rowspan="5" >
<p align="center" class="MsoNormal" ><span >0x006Fx</span></p>
</td>
<td width="60" rowspan="5" >
<p align="center" class="MsoNormal" ><span >0x0F</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 5000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >E53xx, L53xx, X53xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Kentsfield</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 3000<br />Core™ 2 Quad<br />Core™ 2 Extreme</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >X32xx<br />Q6600<br />QX6xxx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Conroe</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 3000<br clear="all"  />Pentium™<br />Core™ 2 Duo<br />Core™ 2 Extreme<br />Celeron™ Desktop</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >30xx<br />E21xx<br />E43xx,E6xxx<br /><span class="baec5a81-e4d6-4674-97f3-e9220f0136c1" >X6800</span><br />E1600</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Merom</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Core™ 2 Duo M<br />Pentium™ Mobile<br />Core™ 2 Extreme M</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >L7xxx,T5xxx,T7xxx,U7xxx<br />T3200<br />X7xxx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Woodcrest</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™ 5000</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >51xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Merom<br />Conroe</span></p>
</td>
<td width="67" >
<p align="center" class="MsoNormal" ><span >0x1066x</span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x16</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Celeron™ Desktop<br />Celeron™ Mobile</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >4xx<br />5xx</span></p>
</td>
</tr>
<tr >
<td width="112" rowspan="2" >
<p align="center" class="MsoNormal" ><span >Presler</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Cedar Mill</span></p>
</td>
<td width="67" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x0066x</span></p>
</td>
<td width="60" rowspan="4" >
<p align="center" class="MsoNormal" ><span >0x0F</span></p>
</td>
<td width="60" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x06</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Pentium™ 4</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >3xx, 6xx</span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Presler</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Pentium™ D</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >9xx</span></p>
</td>
</tr>
<tr >
<td width="75" rowspan="3" >
<p align="center" class="MsoNormal" ><span >90 nm</span></p>
</td>
<td width="112" rowspan="2" >
<p align="center" class="MsoNormal" ><span >Prescott</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Nocona<br />Irwindale</span></p>
</td>
<td width="67" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x0063x<br />0x0064x</span></p>
</td>
<td width="60" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x03/<br />0x04</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Xeon™</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span ></span></p>
</td>
</tr>
<tr >
<td width="106" >
<p align="center" class="MsoNormal" ><span >Prescott</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Celeron™ D<br />Pentium™ 4</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >3xx<br />5xx</span></p>
</td>
</tr>
<tr >
<td width="112" >
<p align="center" class="MsoNormal" ><span >Dothan</span></p>
</td>
<td width="106" >
<p align="center" class="MsoNormal" ><span >Dothan</span></p>
</td>
<td width="67" >
<p align="center" class="MsoNormal" ><span >0x006Dx</span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x06</span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x0D</span></p>
</td>
<td width="128" >
<p class="MsoNormal"><span >Celeron™ M<br />Pentium™ Mobile</span></p>
</td>
<td width="182" >
<p class="MsoNormal"><span >3xx<br />7xx</span></p>
</td>
</tr>
</tbody>
</table>
<p class="MsoNormal"> </p>
</div>
<p> </p>
<p><a name="_atom" href="http://software.intel.com#_atom" >Atom™ Architectures and Processors</a></p>
<p><i>This table includes the Atom™ processors on 45nm and later process technology. Please read and understand these important <a href="http://software.intel.com#_disclaimers">disclaimers</a> prior to use.</i></p>
<div class="WordSection1">
<table width="737" cellpadding="0" cellspacing="0" border="0" class="MsoNormalTable" >
<tbody>
<tr >
<td width="68" >
<p align="center" class="MsoNormal" ><b><span >Process<br />Technology<o:p></o:p></span></b></p>
</td>
<td width="76" >
<p align="center" class="MsoNormal" ><b><span >Architecture Codename<o:p></o:p></span></b></p>
</td>
<td width="75" >
<p align="center" class="MsoNormal" ><b><span >Processor Codename<o:p></o:p></span></b></p>
</td>
<td width="68" >
<p align="center" class="MsoNormal" ><b><span >Platform<br />Codename<o:p></o:p></span></b></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><b><span >Processor<br />Signature<o:p></o:p></span></b></p>
</td>
<td width="53" >
<p align="center" class="MsoNormal" ><b><span ><span ></span>Family<br />Number<o:p></o:p></span></b></p>
</td>
<td width="53" >
<p align="center" class="MsoNormal" ><b><span >Model <br />Number<o:p></o:p></span></b></p>
</td>
<td width="148" >
<p align="center" class="MsoNormal" ><b><span >Intel® Brand <br />Name(s)<o:p></o:p></span></b></p>
</td>
<td width="209" >
<p align="center" class="MsoNormal" ><b><span >Intel® Brand <br />Model Number<o:p></o:p></span></b></p>
</td>
</tr>
<tr >
<td width="68" >
<p align="center" class="MsoNormal" ><span >32 nm<o:p></o:p></span></p>
</td>
<td width="76" rowspan="4" >
<p align="center" class="MsoNormal" ><span >Atom™<o:p></o:p></span></p>
</td>
<td width="75" >
<p class="MsoNormal"><span class="SpellE"><span >Cedarview</span></span><span ><o:p></o:p></span></p>
</td>
<td width="68" >
<p class="MsoNormal"><span >Cedar Trail<o:p></o:p></span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x0366x<o:p></o:p></span></p>
</td>
<td width="53" rowspan="4" >
<p align="center" class="MsoNormal" ><span >0x06<o:p></o:p></span></p>
</td>
<td width="53" >
<p align="center" class="MsoNormal" ><span >0x36<o:p></o:p></span></p>
</td>
<td width="148" rowspan="4" >
<p align="center" class="MsoNormal" ><span >Atom™<o:p></o:p></span></p>
</td>
<td width="209" >
<p class="MsoNormal"><span >N2000 series:<span > </span>N26xx, N28xx<br />D2000 Series:<span > </span>D25xx (no HT), D27xx<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="68" rowspan="3" >
<p align="center" class="MsoNormal" ><span >45 nm<o:p></o:p></span></p>
</td>
<td width="75" >
<p class="MsoNormal"><span >Lincroft<o:p></o:p></span></p>
</td>
<td width="68" >
<p class="MsoNormal"><span >Oak Trail<o:p></o:p></span></p>
</td>
<td width="60" >
<p align="center" class="MsoNormal" ><span >0x0266x<o:p></o:p></span></p>
</td>
<td width="53" >
<p align="center" class="MsoNormal" ><span >0x26<o:p></o:p></span></p>
</td>
<td width="209" >
<p class="MsoNormal"><span >Z6xx (single core)<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="75" >
<p class="MsoNormal"><span class="SpellE"><span >Pineview</span></span><span ><o:p></o:p></span></p>
</td>
<td width="68" >
<p class="MsoNormal"><span >Pine Trail<o:p></o:p></span></p>
</td>
<td width="60" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x016Cx<o:p></o:p></span></p>
</td>
<td width="53" rowspan="2" >
<p align="center" class="MsoNormal" ><span >0x1C<o:p></o:p></span></p>
</td>
<td width="209" >
<p class="MsoNormal"><span >N4xx, D4xx (single core)<br />N5xx, D5xx (dual core)<o:p></o:p></span></p>
</td>
</tr>
<tr >
<td width="75" >
<p class="MsoNormal"><span >Silverthorne<o:p></o:p></span></p>
</td>
<td width="68" >
<p class="MsoNormal"><span >any<o:p></o:p></span></p>
</td>
<td width="209" >
<p class="MsoNormal"><span >Z5xx<o:p></o:p></span></p>
</td>
</tr>
</tbody>
</table>
<p class="MsoNormal"><o:p></o:p></p>
</div>
<p> </p>
<p><a href="http://software.intel.com#_disclaimers" name="_disclaimers" >Disclaimers</a></p>
<p class="Disclaimer"><b>Information in this article is intended as a convenient summary of the contents of the <a href="http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html">"Intel® Processor Identification and the CPUID Instruction"</a> application note and the <a href="http://ark.intel.com/">official Intel® product information source</a>. </b></p>
<p class="Disclaimer"><b>In <i>case of discrepancy,</i> the information in the <a href="http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html">original application note</a> and <a href="http://ark.intel.com/">product information source</a> supersede the contents of this article. (Please notify the author of any such discrepancy).</b></p>
<p class="Disclaimer"><b>Please consult <i><span >Section 2: Usage Guidelines</span></i> of the <a href="http://www.intel.com/content/www/us/en/processors/processor-identification-cpuid-instruction-note.html">"Intel® Processor Identification and the CPUID Instruction"</a> for the proper use of CPUID.</b></p>
<p class="Disclaimer">Intel® processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See <a href="http://www.intel.com/products/processor_number">http://www.intel.com/products/processor_number</a> for details.</p>
<p class="Disclaimer"><br />All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.</p>
<hr align="left" size="1" width="33%" />
<p><a href="http://software.intel.com#_ftnref1" name="_ftn1"><br />[1]</a> For an example of interrogating CPUID to verify features please read <a href="http://software.intel.com/en-us/articles/using-cpuid-to-detect-the-presence-of-sse-41-and-sse-42-instruction-sets/">Using CPUID to Detect the presence of SSE 4.1 and SSE 4.2 Instruction Sets</a></p>
<p><a href="http://software.intel.com#_ftnref2" name="_ftn2">[2]</a> In Linux based operating systems you can type ‘cat /proc/cpuinfo' to obtain the processor family and model numbers (note they are formatted in decimal, while the tables in this article containhexadecimal formatting of these numbers).</p>
<p><b></b></p>
</b> ]]></description>
      <link>http://software.intel.com/en-us/articles/intel-processor-identification-with-cpuid-model-and-family-numbers/</link>
      <pubDate>Tue, 04 Oct 2011 00:00:00 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/intel-processor-identification-with-cpuid-model-and-family-numbers/#comments</comments>
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      <category>Software Products General</category>
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      <category>Resources For Software Developers</category>
    </item>
    <item>
      <title>Error with IntelPgk while using Visual Studio* integration</title>
      <description><![CDATA[ <b>Problem : </b><br />
<div id="art_pre_template">After installing the Intel C++ Composer XE 2011 Update 5 the integration of Microsoft* Visual Studio 2010* or Visual Studio 2008* does not work anymore. There are different kind of error messages like the one below showing up:<br /><img title="error_msg.png" alt="error_msg.png" src="http://software.intel.com/file/38078" /><br /><br />There are also errors indicating that the files IntelCppOptPkg.dll or IntelLibOptPkg.dll are missing. <br />It's not possible to use the Intel C++ compiler within Visual Studio.</div>
<div id="art_pre_template"><br /><b>Root Cause : </b><br />An older beta package was likely installed on the system. The beta package contains higher version number so when installing the newer product update with lower version number the installation could not cleanly uninstall the beta.  And at the end the IDE integration module contains a mismatched files. <br /><br />Note: it is difficult to install an older product on top of a new project correctly. <br /><br /><b>Resolution : </b><br />Clean the IDE integration module manually with steps below: <br /><br /><ol>
<li>Uninstall the Intel C++ Composer XE 2011 update 5</li>
<li>Uninstall the Intel C++ Composer beta</li>
<li>Delete folder C:\Program Files (x86)\Microsoft Visual Studio 10.0\Common7\IDE\Extensions\intel</li>
<li>Delete two files under C:\Program Files (x86)\Microsoft Visual Studio 10.0\Common7\IDE\PublicAssemblies<ol type="a">
<li>IntelCppOptPkg.dll</li>
<li>IntelLibOptPkg.dll</li>
</ol></li>
<li>Delete folder C:\Program Files (x86)\Common Files\Intel\shared files\VS Integration <ol type="a">
<li>Before remove above folder, need to uninstall the IDE integration of vs2008/2005</li>
<li>Open "Visual Studio 2008 Command Prompt" using "<b>Run as administrator</b>", and go to "C:\Program Files (x86)\Common Files\Intel\shared files\VS Integration\C++\VS2008". <ol type="i">
<li>integrate "[vs2008-root-dir]" /u       
<ul>
<li>On a Windows 7 x64 system this would be:<br />$ integrate "c:\Program Files (x86)\Microsoft Visual Studio 9.0" /u</li>
</ul>
</li>
<li>devenv /setup</li>
</ol></li>
</ol></li>
<li>Reinstall Intel C++ Composer XE 2011 update 5</li>
</ol>There is a batch file "cleanIDEintegration.bat.txt" attached that will do the step#3, #4, #5. Two notes below when using it:
<p> </p>
<ol>
<li>Make sure the directory for Visual Studio 2010 and 2008 match your directory;</li>
<li>and also it needs to be run using "<b>Run as administrator</b>".</li>
</ol>
<p>This issue is fixed in Intel C++ Composer XE 2011 Update 6 and later.</p>
</div> ]]></description>
      <link>http://software.intel.com/en-us/articles/error-with-intelpgk-while-using-visual-studio-integration/</link>
      <pubDate>Sat, 06 Aug 2011 15:00:00 -0700</pubDate>
      <comments>http://software.intel.com/en-us/articles/error-with-intelpgk-while-using-visual-studio-integration/#comments</comments>
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      <category>Tools</category>
      <category>Intel® C++ Compiler for Windows* Knowledge Base</category>
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