In my first blog entry, I showed how simple it was to improve the accuracy of the power draw reported by the Intel® Energy Checker SDK’s stock ESRV simulated device library. I also opened-up for a nice research project consisting of using various system-level data to model more precisely a host system’s power draw. Data such as processor load, memory and I/O usage, P-State or C-State residency are good candidates to explore.
Recently we have read the post "Managing Lock Contention: Large and Small Critical Sections" where the author touches upon the question of optimizing critical sections. I am not going to retell this post here but I would like to note that the author gives there some examples of how useful it is to unite sometimes several code fragments with critical sections into one large critical section. For example, instead of