The Cost Benefit Case for Database Migration to Intel Servers
Although server consolidation has become pervasive, to date it has been more commonly applied to application and infrastructure servers, rather than database servers. This report examines the cost savings by upgrading and consolidating IBM DB2 databases. Type: Technical Article |
11/11/2009
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An evaluation of the impact of memory configuration on the performance of applications running on Intel® Xeon® processor 5500-series based servers
Optimizing memory configurations of servers using the 5500 series Intel® Xeon® processors is important to optimize bandwidth from the three-channel memory controller. This paper provides information on various memory configurations on 16 HPC applications. Author: Robert Godley (Intel) Type: Technical Article |
10/28/2009
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HowTo – HPL Over Intel MPI
This is a step by step procedure of how to run the High Performance Linpack (HPL)benchmark on a Linux cluster using Intel-MPI. This was done on a Linux cluster of 128 nodes running Intel’s Nehalem processor 2.93 MHz with 12GB of RAM on each node. Author: Mohamad Sindi Type: Technical Article,Download |
10/26/2009
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Performance of MPI cluster applications with Intel(r) HyperThreading Technology
6 HPC cluster applications benchmarked with Intel(r) HyperThreading Technology enabled and disabled on Intel(r) Xeon(r) 5560 CPU cluster Author: Timothy Prince (Intel) Type: Technical Article |
10/13/2009
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Java Application Server Optimization for Multi-core Systems
This paper examines the performance characteristics of Java application servers running on 32-bit and 64-bit Java Virtual Machines (JVM) and operating systems on the latest architectures and platforms available today. Author: Khun Ban (Intel) Type: Technical Article |
10/07/2009
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"Vectorization: Writing C/C++ code in VECTOR Format"
Vectorization: Writing C/C++ code in VECTOR FormatMukkaysh SrivastavComputational Research Laboratories (CRL) - Pune, India
1.0 Introduction: Vectorization has been key optimization principle over ... Author: srimks Type: Technical Article |
10/06/2009
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Running The HPL Benchmark Over Intel MPI
This is a step by step procedure on how to run the High Performance Linpack (HPL) benchmark on a Linux cluster using Intel-MPI. This was done on a Linux cluster of 128 nodes running Intel’s Nehalem processor 2.93 MHz with 12GB of RAM on each node. Author: Mohamad Sindi Type: Technical Article |
09/28/2009
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IBM DB2 9.7 on Intel Xeon Processor 5500 Series
Are you spending too much on your database?
PROGRAMMING: Automated tuning features in DB2 9.7 outperformed expert IBM engineers.
PERFORMANCE: Intel Xeon processor 5500 series delivers 9x the perfor ...
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09/17/2009
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DB2* 9 pureXML* Scalability on Intel® Xeon® MP Platforms Using IBM N Series* Storage
Introduction
With the recent launch of the next-generation Intel® Xeon® processor MP, IBM DB2* 9, and IBM N Series storage, businesses can now enjoy the rich processing power and performance benefits ...
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08/17/2009
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Intel® compiler options for SSE generation (SSE2, SSE3, SSSE3, SSE4) and processor-specific optimizations
Explains which Intel Compiler switches to use to target and optimize for a specific platform, cpu or processor. Type: Technical Article,Code |
07/13/2009
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Prana Studios leverages Intel® Xeon® Processor 5500 Series to get better 3D animation rendering
Introduction: Prana Studios is a leading Animation house based out of Mumbai and Los Angeles. Prana's core business is focused on four main areas: Long-form CG content, location based entertainment, g ... Author: Preethi Raj (Intel),Udaysimha Mysore (Intel),Rama Kishan Malladi (Intel) Type: Technical Article |
07/08/2009
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High Clocks Per Instruction Retired when vectorizing the loop.
Sometimes when we vectorize a loop, we get a high Clocks Per Instruction Retired (CPI) value. This happens when there is high bus utilization and the bus gets saturated. Type: Technical Article,Code |
11/18/2008
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Porting Code to Intel® EM64T-Based Platforms
by Robert Y. GevaPrincipal Engineer, Intel Software and Solutions Group
Introduction
Porting code from IA-32 architecture to EM64T to take advantage of 64-bit involves tradeoffs in performance consid ... Author: Robert Geva (Intel) |
10/24/2008
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Porting Chains: 64-bit Intel® Xeonr Processor to Intel® Itanium® Processor
by Alan Zeichick
Introduction
Read the tale of two migrations: vertically to the Intel® Xeon® processor with Intel® Extended Memory 64 Technology, then horizontally to Intel® Itanium® microarchit ...
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10/23/2008
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Demystifying the Enterprise Choices and Scaling Hardware for Oracle*-Based Apps
by Matt Gillespie
Introduction
The 64-bit Intel® Xeon® processor extends the choices for organizations developing and deploying enterprise applications based on Oracle Database* 10g. This archit ... Author: Matthew Gillespie |
10/23/2008
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Intel® Xeon® Processor MP: Enabling Powerful Enterprise Solutions
Introduction
The choice of the server/processor complex significantly affects the ability of data center managers to achieve their objectives. For example, the Intel® Xeon™ processor for dual processi ...
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10/20/2008
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Intel® Xeon® Processor MP: Enabling Enterprise Application Clusters
Introduction
For today's e-Business data centers, enterprise applications in all tiers must deliver the highest performance for fast responses to user requests - regardless of fluctuating loads - and ...
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10/20/2008
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Developing for Speed: A Four-Step Approach
by George Walsh
Introduction
There's really no denying that application optimization yields performance benefits. The question in each case is whether time spent optimizing and resulting perform ... Author: gbwalsh Type: Technical Article |
10/20/2008
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Microsoft .NET* on Intel® Xeon™ Processor
by Thomas E. Martinez, Intel Corporation
Introduction
This article identifies the features (many of which are new) in the Intel® Xeon™ processor that make it an effective and efficient platform f ...
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10/17/2008
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Cross Intel® Architecture Development Tools
Introduction
Recent years have yielded an amazing number of new operating systems, new processors, and new platform capabilities that provide exciting opportunities for application developers. Con ...
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10/17/2008
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Intel® Xeon® Processors and Itanium® 2 Processors - Picking the Right
by Roger Smith
Introduction
Software developers have two powerful allies in their quest for optimal applications performance: Explicitly Parallel Instruction Computing (EPIC) and Hyper-Threading ...
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10/17/2008
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Introducing Intel® NetBurst® MicroArchitecture Optimization
Introduction
A Deeper Pipeline and New Cache Structure
The Intel NetBurst® microarchitecture is a new feature from Intel that was introduced in the Pentium® 4 and Intel® Xeon™ processors. Althoug ...
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10/17/2008
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Running .NET on Intel® Xeon® processors: The Fastest Platform in Town
by Alan Zeichick
Introduction
The Intel® Xeon® processor is the top-end member of the processor family based on Intel's new NetBurst™ micro-architecture. Numerous improvements in the processor du ...
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10/17/2008
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Intel® Extended Memory 64 Technology - Porting IA-32 Applications to the Intel® Xeonr Processor
Introduction
by Jill SteinbergOne of the many technologies Intel has brought to market with its introduction of a new generation of Intel® Xeon® processor-based server and workstation platforms, ba ...
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10/03/2008
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Take Advantage of the Memory Features of 64-Bit Computing
Introduction
A move to developing for Itanium®-based systems and Intel® Extended Memory 64 Technology (Intel® EM64T) can liberate a programmer. 64-bit computing is a great technical fix for many of ... Author: Cameron Laird |
10/03/2008
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