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Title Tag(s) Modified Date
Intel® Compiler Options for Intel® SSE and Intel® AVX generation (SSE2, SSE3, SSE3_ATOM, SSSE3, SSE4.1, SSE4.2, AVX, AVX2) and processor-specific optimizations
Explains which Intel® Compiler switches to use to target and optimize for a specific platform, microarchitecture, CPU or processor.
Type: Code
 dual-core xeon pentium SSE2 SSE3 SSE Core 2 Duo SSE4.2 SSSE3 SSE4.1 MMX Core 2 Quad atom Core i7 compiler AVX vcsource_domain_media vcsource_os_windows vcsource_platform_desktoplaptop vcsource_domain_graphics vcsource_product_icc vcsource_index 09/02/2010
High Clocks Per Instruction Retired when vectorizing the loop.
Sometimes when we vectorize a loop, we get a high Clocks Per Instruction Retired (CPI) value. This happens when there is high bus utilization and the bus gets saturated.
Type: Code
 simd SSE2 SSE3 SSE4 SSE High CPI Vectorizer hardware prefetcher SSE1 Memoray latency BUS Saturation Vtune 11/18/2008