Intel® Developer Zone:
Intel® AVX

Vision Statement

The need for greater computing performance continues to grow across industry segments. To support rising demand and evolving usage models, we continue our history of innovation with the Intel® Advanced Vector Extensions (Intel® AVX).

Intel® AVX is a new-256 bit instruction set extension to Intel® SSE and is designed for applications that are Floating Point (FP) intensive. It was released early 2011 as part of the Intel® microarchitecture code name Sandy Bridge processor family and is present in platforms ranging from notebooks to servers. Intel AVX improves performance due to wider vectors, new extensible syntax, and rich functionality. This results in better management of data and general purpose applications like image, audio/video processing, scientific simulations, financial analytics and 3D modeling and analysis.

Overview

Tools & Downloads

  • Intel® C++ Compiler

    The Intel® C++ Compiler is available for download from the Intel® Registration Center for all licensed customers. Evaluation versions of Intel® Software Development Products are also available for free download.

  • Intel Intrinsics Guide

    The Intel Intrinsics Guide is an interactive reference tool for Intel intrinsic instructions, which are C style functions that provide access to many Intel instructions – including Intel® Streaming SIMD Extensions [XX] (Intel® SSE[XX]), Intel® Advanced Vector Extensions (Intel® AVX), and more – without the need to write assembly code.

    • Intel Intrinsics Guide (OS X*)
    • Intel Intrinsics Guide (Linux*)
    • Intel Intrinsics Guide (Windows*)
02-Aug-2012
2:23 PM PDT
Optimize for Intel® AVX Using Intel® Math Kernel Library's Basic Linear Algebra Subprograms (BLAS) with DGEMM Routine
By Gregory Henry (...4
Introduction Although our initial efforts supports tunings and functionality in three areas, the Intel® Math Kernel Library (Intel® MKL), provides a broader set of functionality for scientific and engineering use. These are highlighted below: Linear Algebra – Basic Linear Algebra Subprograms (BLAS . . .
02-Aug-2012
2:19 PM PDT
IPP Dispatcher Control Functions - ipp*Init*() functions
By Paul Fischer (Intel)1
Initializing the IPP static and dynamic libraries for optimal performance.
02-Aug-2012
2:15 PM PDT
Intel® IPP 7.0 Release Notes
By Ying Song (Intel)1
Summary of new features and changes in the Intel IPP 7.0
15-Jun-2012
8:44 AM PDT
Intel® Software Development Emulator Release Notes
By Mark Charney (Intel)0
Release notes for the Intel® Software Development Emulator

Pages

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SIMD tuning with ASM pt. 3 - PS good, SS bad
By Matt Walsh (Intel)Posted May 31st 20124
If you recall where we left off on my post yesterday we compiled a test program with gcc and saw this code for the 'working' part of a loop. (Yes, I will be getting to the Intel C++ compiler ...
SIMD tuning with ASM pt. 2 - Your First Dump
By Matt Walsh (Intel)Posted May 30th 20126
(here's part 1 in case you missed it) Let's take a really, really simple program. It just adds one array of things to another. This should be a SIMD slam dunk! I will call this ...
Vectorization Series, Part 2- Who Can Use It?
By Shannon Cepeda ...Posted February 13th 20120
In my last blog, I introduced the concept of vectorization, which is parallelism across data elements in a register inside a single CPU core. It's a topic that I am very excited about this year, ...
Autovectorization in Intel® OpenCL SDK 1.5
By Nadav Rotem (Intel)Posted September 26th 20117
Hi everyone! Intel just released the Intel® OpenCL SDK version 1.5, and I want to highlight one improvement that is very important but not always visible to the user: the new Implicit CPU ...

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Mark Charney (Intel)Fri, January 4th 2013 - 9:25
Intel® Software Development Emulator, Release 5.385
Hello, we just released version 5.38  of the Intel Software Development Emulator. It is available here:http://www.intel.com/software/sde It  includes:  better support for OS X (Snow Leopard and Lion) using code signing. improved support for the ...
Mark Buxton (Intel)Fri, June 10th 2011 - 19:20
Haswell New Instructions posted14
A full specification for the Haswell (2013) new instructions was just posted to the programmer's reference manual at http://software.intel.com/file/36945. A blog will be coming shortly. -Mark Buxton
Thomas Willhalm...Fri, December 31st 2010 - 7:07
Links to instruction documentation23
The Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A and 2B (available here) are the instruction set reference. Haswell (2013) new instructionsare in theprogrammer's ...
Sergey KostrovSun, May 19th 2013 - 21:03
Latency of a General purpose MOV instruction on Intel CPUs13
Hi everybody, I'd like to hear from Intel engineers that Latency of a General purpose MOV instruction on any Intel CPUs is 1 clock cycle. For example, I've completed a set of tests for Intel(R) Pentium(R) 4 CPU 1.60GHz and my numbers are as follows: [ Intel C++ compiler - DEBUG ]...Overhead of ...

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