How game developers benefit from current microarchitectures

By Michael J Huelskoetter (70 posts) on August 11, 2009 at 1:50 am

In my yesterday's blog post I talked about the tech sessions at GDC 2009 which relate to programming aspects. One part of the sessions consists of four workshops being organised by Intel. For all of you who want to know upfront what you can expect from these sessions we share some insights with you. All the others are warmly invited to gather more information about GDC Europe 2009.

On Monday 5:40 pm Leigh Davies will ask one important question: how can game developers keep pace with the ongoing development in the processor segment and how can they benefit from that. So it's all about current Intel microarchitectures (Core 2, Core i7) and future architectures (Westmere, Sandy Bridge). So Leigh's advice sounds quite simple: Game developers should be able to adopt to these permanent changes. That's why programmers are being asked to leave the sequential path and head for the parallel programming of their gaming titles.

But Leigh will not only scratch the surface: he will talk about the last three microarchitectures in depth (Pentium 4, Core and Core i7) and explain the advantages of the newer architectures. And in particular there will be a lot of information regarding the current Core i7 architecture. So Leigh will present important features like improved branch predictions, higher memory bandwidths and a lot more.

Especially the improved memory system of the Core i7 architecture is a big chance (and challenge) for game developers: the latencies are dramatically lower compared to the Core architecture (approx. minus 40 percent) and the bandwidth could be raised from 10 GB/sec. to 33 GB/sec. So if you have to deal with 3D objects which consist of thousands and thousands of polygons you really benefit from these features.

Moreover the hardware based programming with the help of the SSE instruction set improves gaming titles. Because of the SSE4 instructions a lot of operations can be executed faster and more efficiently. That's why Leigh Davies will give an helpful advice: "Your users have SSE - so use it!".

But it's not only about main memory: Hyper-Threading which is supported by many Intel CPUs (Intel also calls it SMT = Simultaneous Multi-Threading) offers built-in parallelism to a certain extent: Two threads are processed at the same time, resources are used simultaneously and due to optimized out-of-order execution units CPI could be reduced (CPI = clockticks by instruction). The good news: The Core i7 architecture handles SMT even better as its predecessor: caches are bigger, bandwidth has been extended and the execution units calculate faster.

Finally Leigh will also talk about the future during his session: He will share some insights regarding the next microarchitecture codenamed "Sandy Bridge" which offers 256 bit wide SSE registers. This will accelerate the parallel data processing at processor level. Moreover Mister Davies will discuss some Larrabeee aspects briefly and how this will effect the future of software development. But fortunately, there will be two dedicated tech sessions referring to Larrabee in detail. And I will cover these as well. Cross my heart and hope to die!