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Sea of cores: we're missing the ship

By Dan Ernst (3 posts) on September 14, 2010 at 5:03 pm

We're now a few hours past the IDF panel session.  Matt Wolf and I had the chance to have a really great discussion with a group of developers and professors who were interested in addressing the issues of parallelism within education from the architecture and operating systems perspective.

Here are some things we learned:

• Parallelism can be used to describe both hardware and software... and it can be easy to confuse which one you're talking about. Clear abstractions and definitions are needed - students don't respond well to ambiguity.
• Computer Science education needs to get back to a place where it thinks about computation -- actual running code with some power and performance profile -- instead of just focusing on ideal models
• Today's parallel tools leave a lot to be desired on the educational front - most of the industrial tools (and languages) offer too much detail to be usable by novice programmers.
• Verilog can express parallel computation and parallel architecture models, but it's not exactly what we want for Freshman (or anybody else, for that matter)
• There's hope that some judicious improvements in OS or architecture might make a big difference -- transactional memory or more explicit addressing to multi-tier memory being some thoughts.
• Parallelism may just be the first step in a larger transformation -- virtualization, cloud-on-a-chip, deep memory hierarchies, NVRAM-on-chip, and so on.  Issues like data locality and cache behavior will be coming soon to the academic "to-do list".  5 years from now might not look like you're parent's computing.

What does this say about the larger educational perspective?  We've got a bunch of rafts, canoes, and other flotsam embarking on the sea of cores.  We're using languages, architectures, libraries, algorithms, and software engineering to try to move forward... but we don't have any kind of single ship we can all agree on.  We're not really even sure what basic model we want (catamaran? speedboat?  oil tanker?)

At least not yet.   The conversation continues!

Categories: Academic
Tags: Academic, IDF2010, Panel

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Comments (3)

September 15, 2010 1:39 AM PDT Dmitriy Vyukov Total Points: 43,894 Black Belt

> There's hope that some judicious improvements in OS or architecture might make a big difference It's as expected as it's unlikely. Current OSes hide basically nothing principal, so there is basically nothing they can provide on top. > transactional memory Yes, but not in the form most people think - not in the form of programming model, but in the form of an advanced synchronization primitive. And then once again it does not but you anything if you are concerned with magical tools for novice developers. > or more explicit addressing to multi-tier memory being some thoughts. First, it's additional burden on developers. Then, good concurrent design and good memory access patterns work perfectly straight away; bad concurrent design and bad memory access patterns can't be fixed by droplets of some magical instructions.

September 15, 2010 3:38 PM PDT Matthew Wolf Total Points: 905 Black Belt

I don't think that either Dan or I supposed that there was some magic that could let novice programmers suddenly turn out perfectly parallel code -- far from it. So at that level, I think we all agree. However, I have to disagree with you that modern OSes just show you everything. That's pretty far from the truth. If you ask your OS, it will probably tell you that your hard drive has 128 platters with 255 drive heads, even if you have an SSD with no moving parts. It'll tell you that you just have an ethernet device, even though you have a processor and embedded OS capable of doing tcp off-loading and ssl encryption on the board. And we won't even get into the strange contortions of presenting ranks of SIMD processors (ie GPUs) as if they're just a single device. So the OS presents all sorts of 'non-real' hardware abstractions to us all the time. The sorts of things that we were talking about in the lunch break-out were a step further -- for example, what if multicore+virtualization leads to the full-on cloud-on-a-socket model. Now programming gets a little easier -- it all looks like internet-scale client-server codes. Performance would suffer... but then comes that question of whether or not someone could find something clever to do (a variant on extended page tables?) that would make that cost disappear. Clearly that doesn't work short term, and the practical steps for the near term have to follow up on what's possible in java, C#, C++, and so on. But we live in interesting times, and I think the group came away thinking that there still were opportunities to be had.

September 15, 2010 11:48 PM PDT Dmitriy Vyukov Total Points: 43,894 Black Belt

> However, I have to disagree with you that modern OSes just show you everything. I mean solely SMP aspect of modern systems (our area of discussion). I am a bit involved in SMP concurrent/parallel programming, and I do not see anything principal that is hidden. Is there anything? > Now programming gets a little easier -- it all looks like internet-scale client-server codes. And... what stops me to design and implement my systems in such way right now?.. For me it looks like XML, before which we evidently were not able to do any serialization

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