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	<title>Blogs &#187; Jeff Kataoka (Intel)</title>
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		<title>Jeff&#039;s Notebook: Released for vPro™ technology: Intel® Setup and Configuration Software 8.0</title>
		<link>http://software.intel.com/en-us/blogs/2012/04/13/jeffs-notebook-released-for-vpro-technology-intel-setup-and-configuration-software-80/</link>
		<comments>http://software.intel.com/en-us/blogs/2012/04/13/jeffs-notebook-released-for-vpro-technology-intel-setup-and-configuration-software-80/#comments</comments>
		<pubDate>Fri, 13 Apr 2012 21:25:48 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Manageability & Security]]></category>
		<category><![CDATA[AMT]]></category>
		<category><![CDATA[Intel AMT]]></category>
		<category><![CDATA[Intel AMT Setup and Configuration Software]]></category>
		<category><![CDATA[Manageability]]></category>
		<category><![CDATA[vpro]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2012/04/13/jeffs-notebook-released-for-vpro-technology-intel-setup-and-configuration-software-80/</guid>
		<description><![CDATA[Good news for IT Managers and manageability software developers for Intel® vPro™ technology.  Our Intel vPro experts are constantly working our developer tools to improve the IT management of vPro client networks.  This week, they have released Intel Setup and Configuration Software (Intel® SCS) 8.0 to help IT managers and manageability software developers to set up and configure Intel® Active [...]]]></description>
			<content:encoded><![CDATA[<p>Good news for IT Managers and manageability software developers for Intel® vPro™ technology.  Our Intel vPro experts are constantly working our developer tools to improve the IT management of vPro client networks.  This week, they have released Intel Setup and Configuration Software (Intel® SCS) 8.0 to help IT managers and manageability software developers to set up and configure Intel® Active Management Technology features on systems with Intel Core™ vPro™ Processors.  <a href="http://software.intel.com/en-us/articles/download-the-latest-version-of-intel-amt-setup-and-configuration-service-scs/?cid=sw:SCS_R8_Dnload_Blog_JK17">Learn more about Intel SCS 8.0 and download it today.</a></p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: The Developer’s Guide to Creating Intel® AMT Certificates for Intel® vPro™ clients</title>
		<link>http://software.intel.com/en-us/blogs/2012/03/06/jeffs-notebook-the-developers-guide-to-creating-intel-amt-certificates-for-intel-vpro-clients/</link>
		<comments>http://software.intel.com/en-us/blogs/2012/03/06/jeffs-notebook-the-developers-guide-to-creating-intel-amt-certificates-for-intel-vpro-clients/#comments</comments>
		<pubDate>Tue, 06 Mar 2012 23:41:07 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Manageability & Security]]></category>
		<category><![CDATA[active management technology]]></category>
		<category><![CDATA[AMT]]></category>
		<category><![CDATA[Intel AMT]]></category>
		<category><![CDATA[vpro]]></category>
		<category><![CDATA[vPro technology]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2012/03/06/jeffs-notebook-the-developers-guide-to-creating-intel-amt-certificates-for-intel-vpro-clients/</guid>
		<description><![CDATA[One of the great features of the latest Intel® vPro™ technology-based clients is that it supports the encryption of communications that an IT manager would have between the management console and the vPro client.  In order to enable this capability, a developer needs to work with a feature of vPro technology, called Intel® Active Management Technology (Intel® AMT).  [...]]]></description>
			<content:encoded><![CDATA[<p>One of the great features of the latest Intel® vPro™ technology-based clients is that it supports the encryption of communications that an IT manager would have between the management console and the vPro client.  In order to enable this capability, a developer needs to work with a feature of vPro technology, called Intel® Active Management Technology (Intel® AMT).  Intel AMT is a capability embedded in Intel vPro technology based clients that enhance the ability of IT organizations to manage enterprise computing facilities. </p>
<p>Using  the Transport Layer Security (TLS), Intel AMT supports the encryption of communications between the management console and clients.  Enabling TLS communications requires the creation of Intel AMT security certificates.  While developers may not be aware of this process, it is a straightforward process. </p>
<p>Gael Hofemeier and Matt Gillespie have written a very thorough guide that gives developers the background and step-by-step procedures to create Intel AMT security certificates.   <a title="vPro Creating Intel AMT Certificates" href="http://software.intel.com/en-us/articles/the-developers-guide-to-creating-intel-amt-certificates/?cid=sw:Blog_Guide_AMT_Certificates_Blog_JK16">Read their guide to discover the step-by-step process.</a></p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Best Known Methods for using Intel® AMT with client virtualization</title>
		<link>http://software.intel.com/en-us/blogs/2012/02/16/jeffs-notebook-best-known-methods-for-using-intel-amt-with-client-virtualization-2/</link>
		<comments>http://software.intel.com/en-us/blogs/2012/02/16/jeffs-notebook-best-known-methods-for-using-intel-amt-with-client-virtualization-2/#comments</comments>
		<pubDate>Thu, 16 Feb 2012 18:46:53 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Manageability & Security]]></category>
		<category><![CDATA[active management technology]]></category>
		<category><![CDATA[AMT]]></category>
		<category><![CDATA[Intel Core vPro]]></category>
		<category><![CDATA[Intel vPro]]></category>
		<category><![CDATA[Manageability]]></category>
		<category><![CDATA[Virtualization]]></category>
		<category><![CDATA[vpro]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2012/02/16/jeffs-notebook-best-known-methods-for-using-intel-amt-with-client-virtualization-2/</guid>
		<description><![CDATA[Virtualization of PC's is being used more and more in many companies to help them to maximize their PC resources for a variety of application uses.  Some businesses are using virtualization with client PCs with Intel®vPro™  technology and Intel® Active Management Technology (Intel® AMT). Yet, there are some key differences you have to consider when using Intel [...]]]></description>
			<content:encoded><![CDATA[<p>Virtualization of PC's is being used more and more in many companies to help them to maximize their PC resources for a variety of application uses.  Some businesses are using virtualization with client PCs with Intel®vPro™  technology and Intel® Active Management Technology (Intel® AMT). Yet, there are some key differences you have to consider when using Intel Active Management Technology features on a virtualized client.  Whether you are an IT manager or even, a software consultant working with a major business client, it is important to know the differences and any other Best Known Methods to allow adjustments to the IT processes for managing virtualized clients with Intel Active Management Technology.  A recent white paper on the vPro Developer Community website describes the expected behavior and these Best Known Methods for IT managers.  <a href="http://software.intel.com/en-us/articles/intel-active-management-technology-on-virtualized-pcs/?cid=sw:Blog_BKM_AMT_Virtualization_JK15">Read the white paper to learn more.</a></p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Intel® vPro ™ Developer Community - A resource for developing PC manageability &amp; security software</title>
		<link>http://software.intel.com/en-us/blogs/2012/01/17/jeffs-notebook-intel-vpro-developer-community-a-resource-for-developing-pc-manageability-security-software/</link>
		<comments>http://software.intel.com/en-us/blogs/2012/01/17/jeffs-notebook-intel-vpro-developer-community-a-resource-for-developing-pc-manageability-security-software/#comments</comments>
		<pubDate>Tue, 17 Jan 2012 23:13:20 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Manageability & Security]]></category>
		<category><![CDATA[AMT]]></category>
		<category><![CDATA[Intel AMT]]></category>
		<category><![CDATA[Intel vPro]]></category>
		<category><![CDATA[Manageability]]></category>
		<category><![CDATA[vpro]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2012/01/17/jeffs-notebook-intel-vpro-developer-community-a-resource-for-developing-pc-manageability-security-software/</guid>
		<description><![CDATA[Well, 2012 is here and with the New Year, you'll be seeing some new topic areas for my blogs.  This year, I'm going to be exploring the additional areas of PC manageability and security software.  This is an area that continues to gain attention by IT managers and software developers that are trying to address the [...]]]></description>
			<content:encoded><![CDATA[<p>Well, 2012 is here and with the New Year, you'll be seeing some new topic areas for my blogs.  This year, I'm going to be exploring the additional areas of PC manageability and security software. </p>
<p>This is an area that continues to gain attention by IT managers and software developers that are trying to address the needs of efficiently managing PC's, addressing malware/viruses and the security of data on PC's.  Intel has been addressing these concerns for some years with its Intel vPro technology that has been built into various Intel processor-based desktops and laptops.  So, if you are a software developer of IT manageability and security software and you want to learn more about vPro technology and how to enable your software to take advantage of it, recently a new community has been launched to provide you with the information that you may want.  This is the <a title="Intel vPro Developer Community" href="http://software.intel.com/en-us/vpro/?cid=sw:Blog_JK13">Intel vPro Developer Community</a>.  Check out this new community and discover more about Intel vPro technology.</p>
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		<title>Jeff&#039;s Notebook: &quot;Tips and Tricks for Kernel Development&quot; in OpenCL</title>
		<link>http://software.intel.com/en-us/blogs/2011/09/01/jeffs-notebook-tips-and-tricks-for-kernel-development-in-opencl/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/09/01/jeffs-notebook-tips-and-tricks-for-kernel-development-in-opencl/#comments</comments>
		<pubDate>Thu, 01 Sep 2011 21:00:32 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[Jeff's Notebook]]></category>
		<category><![CDATA[parallel programming]]></category>
		<category><![CDATA[parallelism]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/09/01/jeffs-notebook-tips-and-tricks-for-kernel-development-in-opencl/</guid>
		<description><![CDATA[I was recently looking through our website looking for new articles, when I stumbled upon an article. "Tips and Tricks for Kernel Development".  I don't know how I missed this article before, but with all the recent interest in OpenCL, I thought this would be a great article for programmers to review if they are doing [...]]]></description>
			<content:encoded><![CDATA[<p>I was recently looking through our website looking for new articles, when I stumbled upon an article. "Tips and Tricks for Kernel Development".  I don't know how I missed this article before, but with all the recent interest in OpenCL, I thought this would be a great article for programmers to review if they are doing kernel development within OpenCL.  This article has great advice for the programmer that is working on kernel development.  Starting with info on "Why optimizing kernel code is important" to "Avoiding Handling Edge Conditions in Kernels" to "Avoid Extracting Vector Components", there are "Tips and Tricks" that I think will come in handy for those programmers focusing on kernel development.  Read the article  <a href="http://software.intel.com/en-us/articles/tips-and-tricks-for-kernel-development/?cid=sw:Blog_JK12">"Tips and Tricks for Kernal Development".</a></p>
<div><a href="http://software.intel.com/en-us/articles/tips-and-tricks-for-kernel-development/?cid=Blog_JK12"> </a></div>
<div><a href="http://software.intel.com/en-us/articles/tips-and-tricks-for-kernel-development/?cid=Blog_JK12"> </a></div>
<p><a href="http://software.intel.com/en-us/articles/tips-and-tricks-for-kernel-development/?cid=Blog_JK12"> </p>
<p></a></p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Solving Memory-Related Bottlenecks in your Parallel Programming</title>
		<link>http://software.intel.com/en-us/blogs/2011/07/29/jeffs-notebook-solving-memory-related-bottlenecks-in-your-parallel-programming/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/07/29/jeffs-notebook-solving-memory-related-bottlenecks-in-your-parallel-programming/#comments</comments>
		<pubDate>Fri, 29 Jul 2011 19:56:39 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[multi-core]]></category>
		<category><![CDATA[parallel programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/07/29/jeffs-notebook-solving-memory-related-bottlenecks-in-your-parallel-programming/</guid>
		<description><![CDATA[One of the issues that multi-core programmers run into as they are trying to get the most performance out of their application is memory-related bottlenecks. Memory-related bottlenecks can cause your application to perform poorly or not to the level that you desire.  Multi-core processors can exacerbate memory problems unless care is taken to conserve memory bandwidth and [...]]]></description>
			<content:encoded><![CDATA[<p>One of the issues that multi-core programmers run into as they are trying to get the most performance out of their application is memory-related bottlenecks. Memory-related bottlenecks can cause your application to perform poorly or not to the level that you desire.  Multi-core processors can exacerbate memory problems unless care is taken to conserve memory bandwidth and reduce memory contention.  There is an article in the new book, "Multi-Core Programming", that deals specifically with Memory-Related Bottlenecks that might provide you with the directions or answers that you are searching for<strong>.  <a href="http://www.intel.com/intelpress/excerpts/mcp2.htm?cid=sw:Mem_Bottlenecks_Blog_JK11" target="_blank">Read an excerpt of this article </a></strong>and see if this book might be helpful to your programming efforts.</p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Get an Intro to Intel® OpenCL Tools</title>
		<link>http://software.intel.com/en-us/blogs/2011/06/23/jeffs-notebook-get-an-intro-to-intel-opencl-tools/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/06/23/jeffs-notebook-get-an-intro-to-intel-opencl-tools/#comments</comments>
		<pubDate>Thu, 23 Jun 2011 18:19:32 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA["Intel OpenCL SDK"]]></category>
		<category><![CDATA[Developer OpenCL Tools]]></category>
		<category><![CDATA[parallelism]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/06/23/jeffs-notebook-get-an-intro-to-intel-opencl-tools/</guid>
		<description><![CDATA[I just discovered a new white paper discussing Intel's OpenCL Tools on the Intel Parallel Programming Community.  Vinay Awasthi, an Intel Application Engineer, has written a detailed paper that outlines the status of OpenCL implementation and available tools for developers using Intel OpenCL SDK.  Vinay provides good descriptions of how to use Intel OpenCL Tools with some excellant [...]]]></description>
			<content:encoded><![CDATA[<p>I just discovered a new white paper discussing Intel's OpenCL Tools on the Intel Parallel Programming Community.  Vinay Awasthi, an Intel Application Engineer, has written a detailed paper that outlines the status of OpenCL implementation and available tools for developers using Intel OpenCL SDK.  Vinay provides good descriptions of how to use Intel OpenCL Tools with some excellant examples and links to access the tools and SDK for your own use.  If you are interested in OpenCL, I think you'll find this article, <a title="Intro to Intel OpenCL Tools" href="http://software.intel.com/en-us/articles/introduction-to-intel-opencl-tools/?cid=sw:Intro_OpenCL_Tools_Blog_JK10">"Introduction to Intel OpenCL Tools"</a>,  worth reading.</p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Show-off Your Programming Skills with Threading Challenge 2011</title>
		<link>http://software.intel.com/en-us/blogs/2011/04/22/jeffs-notebook-show-off-your-programming-skills-with-threading-challenge-2011/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/04/22/jeffs-notebook-show-off-your-programming-skills-with-threading-challenge-2011/#comments</comments>
		<pubDate>Sat, 23 Apr 2011 00:22:50 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[parallel programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/04/22/jeffs-notebook-show-off-your-programming-skills-with-threading-challenge-2011/</guid>
		<description><![CDATA[Whether you are a Master or an Apprentice  programmer, the Intel Threading Challenge 2011 is giving you an opportunity to show-off your programming skills and to compete for a Grand Prize of a Trip to the Intel Developer Forum in San Francisco in September 2011.  Also, there are opportunities to win other prizes. The Threading Challenge 2011 kicked [...]]]></description>
			<content:encoded><![CDATA[<p>Whether you are a Master or an Apprentice  programmer, the <strong>Intel Threading Challenge 2011 </strong>is giving you an opportunity to show-off your programming skills and to compete for a Grand Prize of a Trip to the Intel Developer Forum in San Francisco in September 2011.  Also, there are opportunities to win other prizes.</p>
<p>The Threading Challenge 2011 kicked off on Monday, April 18th.  Programmers will have the opportunity to use their programming skills to provide threading code solutions for a series of interesting programming problems.  There are threading problems for Master programmers and Apprentice programmers.  The first problem is open for you to take the challenge.  <strong><a href="http://software.intel.com/en-us/contests/intel-threading-challenge-2011/contests.php?cid=sw:Thread_Chall_Blog_JK09">Learn more  and get started today!</a></strong></p>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Kernal Template Library</title>
		<link>http://software.intel.com/en-us/blogs/2011/03/25/jeffs-notebook-kernal-template-library/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/03/25/jeffs-notebook-kernal-template-library/#comments</comments>
		<pubDate>Sat, 26 Mar 2011 04:16:50 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[parallel programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/03/25/jeffs-notebook-kernal-template-library/</guid>
		<description><![CDATA[On March 21,  Alex Wells (Intel) posted the Kernel Template Library to the article page of the Parallel Programming Community. This library set of headers defines a methodology for defining High Level helper objects for using them to express the algorithm of a Kernel.  Alex explains breifly how this kernal template library can then apply that kernel to [...]]]></description>
			<content:encoded><![CDATA[<div id="article_text">
<p>On March 21,  Alex Wells (Intel) posted the Kernel Template Library to the article page of the Parallel Programming Community. This library set of headers defines a methodology for defining High Level helper objects for using them to express the algorithm of a Kernel.  Alex explains breifly how this kernal template library can then apply that kernel to each element of its data streams in a data parallel manner.  Alex explains more in his article and has posted the Kernal Template Library for developers to download.  Check this out yourself and <a href="http://software.intel.com/en-us/articles/kernel-template-library/?cid=sw:Kernal_Template_Lib_Blog_JK08">download the Kernal Template Library</a> for your own use. </p>
</div>
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		<slash:comments>0</slash:comments>
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		<title>Jeff&#039;s Notebook: Benefits of Intel® Advanced Vector Extensions (Intel® AVX) for Small Matrices</title>
		<link>http://software.intel.com/en-us/blogs/2011/02/25/jeffs-notebook-benefits-of-intel-advanced-vector-extensions-intel-avx-for-small-matrices/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/02/25/jeffs-notebook-benefits-of-intel-advanced-vector-extensions-intel-avx-for-small-matrices/#comments</comments>
		<pubDate>Sat, 26 Feb 2011 07:01:50 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[Intel AVX]]></category>
		<category><![CDATA[Intel Software Partner Program]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/02/25/jeffs-notebook-benefits-of-intel-advanced-vector-extensions-intel-avx-for-small-matrices/</guid>
		<description><![CDATA[With the launch of the Second Generation Intel® CoreTM processor (utilizing the new Intel® processor microarchitecture codename Sandy Bridge), Intel released Intel Advanced Vector Extensions (Intel AVX) which extends the capabilities of Intel® Streaming SIMD Extensions (Intel® SSE), especially for floating point data and operations. Intel AVX significantly increases the floating-point performance density with improved [...]]]></description>
			<content:encoded><![CDATA[<p>With the launch of the Second Generation Intel® Core<sup>TM</sup> processor (utilizing the new Intel® processor microarchitecture codename Sandy Bridge), Intel released Intel Advanced Vector Extensions (Intel AVX) which extends the capabilities of Intel® Streaming SIMD Extensions (Intel® SSE), especially for floating point data and operations. Intel AVX significantly increases the floating-point performance density with improved power efficiency over previous 128-bit SIMD instruction set extensions.</p>
<p>Recently, I found an interesting whitepaper, <a href="http://software.intel.com/en-us/articles/benefits-of-intel-avx-for-small-matrices/?cid=sw:AVX_Small_Matrices_Blog_JK7">"Benefits of Intel AVX for Small Matrices", </a> written by Pallavi Mehrotra and Richard Hubbard that examines how some of the Intel AVX architecture features such as wider 256-bit registers, new data manipulation and arithmetic primitives can benefit operations on matrices of small sizes. Their whitepaper examines simple operations such as matrix addition and multiplication, as well as more complex ones like computing the determinant of a matrix. <a href="http://software.intel.com/en-us/articles/benefits-of-intel-avx-for-small-matrices/?cid=sw:AVX_Small_Matrices_Blog_JK7">Read their whitepaper to get the full details.</a></p>
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		<title>Jeff&#039;s Notebook: 3D Vector Normalization Using 256-Bit Intel® Advanced Vector Extensions (Intel® AVX)</title>
		<link>http://software.intel.com/en-us/blogs/2011/02/11/jeffs-notebook-3d-vector-normalization-using-256-bit-intel-advanced-vector-extensions-intel-avx/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/02/11/jeffs-notebook-3d-vector-normalization-using-256-bit-intel-advanced-vector-extensions-intel-avx/#comments</comments>
		<pubDate>Fri, 11 Feb 2011 16:42:17 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[3d]]></category>
		<category><![CDATA[3d vectors]]></category>
		<category><![CDATA[AVX]]></category>
		<category><![CDATA[Intel AVX]]></category>
		<category><![CDATA[Sandy Bridge]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/02/11/jeffs-notebook-3d-vector-normalization-using-256-bit-intel-advanced-vector-extensions-intel-avx/</guid>
		<description><![CDATA[With the launch of our New Second Generation Intel® Core processor, there has been a lot of interested in the Intel® Advanced Vector Extensions (Intel® AVX). I decided to investigate more on how application developers targeting the Second Generation Intel core processor for their application might use Intel AVX.  Stan Melax has written a detailed article on [...]]]></description>
			<content:encoded><![CDATA[<p>With the launch of our New Second Generation Intel® Core processor, there has been a lot of interested in the Intel® Advanced Vector Extensions (Intel® AVX). I decided to investigate more on how application developers targeting the Second Generation Intel core processor for their application might use Intel AVX.  Stan Melax has written a detailed article on how developers that are incorporating 3D images into their application might use Intel AVX.  </p>
<p>Stan's article, <a href="http://software.intel.com/en-us/articles/3d-vector-normalization-using-256-bit-intel-advanced-vector-extensions-intel-avx/?cid=sw:3D_Vectors_AVX_Blog_JK6">"3D Vector Normalization Using 256-Bit Intel Advanced Vector Extensions (Intel AVX)"</a> outlines how developers can improve the performance of geometry computations by transposing packed 3D data on-the-fly to take advantage of 8-wide SIMD processing.  Stan details how to exploit 256-bit Intel AVX to normalize an array of 3D vectors.  In his article, he describes a shuffle approach to convert between AOS and SOA on-the-fly in order to make data ready for up to 8-wide single instruction multiple data (SIMD) processing.  <a href="http://software.intel.com/en-us/articles/3d-vector-normalization-using-256-bit-intel-advanced-vector-extensions-intel-avx/?cid=sw:3D_Vectors_AVX_Blog_JK6">Read Stan Melax article to get the details of this use of Intel AVX.<br />
</a></p>
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		<title>Jeff&#039;s Notebook: A new Joint lifetime and access synchronization algorithm for shared dynamic objects</title>
		<link>http://software.intel.com/en-us/blogs/2011/02/03/jeffs-notebook-a-new-joint-lifetime-and-access-synchronization-algorithm-for-shared-dynamic-objects/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/02/03/jeffs-notebook-a-new-joint-lifetime-and-access-synchronization-algorithm-for-shared-dynamic-objects/#comments</comments>
		<pubDate>Thu, 03 Feb 2011 19:14:29 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[Intel Software Partner Program]]></category>
		<category><![CDATA[parallel programming]]></category>
		<category><![CDATA[TBB]]></category>
		<category><![CDATA[Threading Building Blocks]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/02/03/jeffs-notebook-a-new-joint-lifetime-and-access-synchronization-algorithm-for-shared-dynamic-objects/</guid>
		<description><![CDATA[Dynamic objects are created and destroyed at run-time by modern programming practices and computer languages like .NET, but how can we correlate that with multi-core enabled programming? You may need to get a parallel program to sync both lifetime of- and access to- an object in shared memory. Known methods suffer from either limitation of [...]]]></description>
			<content:encoded><![CDATA[<p>Dynamic objects are created and destroyed at run-time by modern programming practices and computer languages like .NET, but how can we correlate that with multi-core enabled programming? You may need to get a parallel program to sync both lifetime of- and access to- an object in shared memory.</p>
<p>Known methods suffer from either limitation of scalability or additional synchronization overhead.  Anton Malakhov has written a detailed blog that examines this situation and presents a new synchronization algorithm for shared dynamic objects.  <a href="http://software.intel.com/en-us/blogs/2011/01/26/joint-lifetime-and-access-synchronization-algorithm-for-shared-dynamic-objects/?cid=sw:Joint_lifetime_Blog_JK5"><strong>Read Anton's blog and share with us what you think of this new synchronization algorithm.</strong></a></p>
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		<title>Jeff&#039;s Notebook: Work a Coding Solution to the Classic Dining Philosophers Problem</title>
		<link>http://software.intel.com/en-us/blogs/2011/01/20/jeffs-notebook-work-a-coding-solution-to-the-classic-dining-philosophers-problem/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/01/20/jeffs-notebook-work-a-coding-solution-to-the-classic-dining-philosophers-problem/#comments</comments>
		<pubDate>Thu, 20 Jan 2011 19:54:46 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA["Graph Community Preview Feature"]]></category>
		<category><![CDATA[parallel programming]]></category>
		<category><![CDATA[TBB]]></category>
		<category><![CDATA[Threading Building Blocks]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/01/20/jeffs-notebook-work-a-coding-solution-to-the-classic-dining-philosophers-problem/</guid>
		<description><![CDATA[Coders and people who love to do jigsaw puzzles have a lot in common.  They look at a challenge, analyze it and then begin working the pieces to solve the puzzle.  Recently, one of our Intel Threading Building Blocks experts, Michael Voss, took the classic "Dining Philosophers Problem" and presented how you could use the [...]]]></description>
			<content:encoded><![CDATA[<p>Coders and people who love to do jigsaw puzzles have a lot in common.  They look at a challenge, analyze it and then begin working the pieces to solve the puzzle.  Recently, one of our Intel Threading Building Blocks experts, Michael Voss, took the classic "Dining Philosophers Problem" and presented how you could use the capabilities of the new Graph Community Preview Feature of the Intel Threading Building Blocks to develop a new coding solution to this classic problem.  Michael goes through his solution and shows how he coded a solution using this new feature.  I think coders looking for new ways to solve a coding solution would find this interesting.  <a href="http://software.intel.com/en-us/blogs/2011/01/10/using-the-intel-threading-building-blocks-graph-community-preview-feature-an-implementation-of-dining-philosophers/?cid=sw:Dining_Philos_Blog_JK4"><strong>Read how this implementation works and tell Michael what you think.</strong></a></p>
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		<title>Jeff&#039;s Notebook: New performance tuning tool for your Parallel Code</title>
		<link>http://software.intel.com/en-us/blogs/2011/01/05/jeffs-notebook-new-performance-tuning-tool-for-your-parallel-code/</link>
		<comments>http://software.intel.com/en-us/blogs/2011/01/05/jeffs-notebook-new-performance-tuning-tool-for-your-parallel-code/#comments</comments>
		<pubDate>Wed, 05 Jan 2011 16:43:59 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Intel SW Partner Program]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2011/01/05/jeffs-notebook-new-performance-tuning-tool-for-your-parallel-code/</guid>
		<description><![CDATA[I love it that we have this great software pathfinding team looking for new ways to make it easier to tune your Parallel code for multi-core systems.  The team has recently posted a new performance tuning tool,  the Intel Software Autotuning Tool (ISAT) that supports automatic searching for the near-optimal values of program parameters that have significant [...]]]></description>
			<content:encoded><![CDATA[<p>I love it that we have this great software pathfinding team looking for new ways to make it easier to tune your Parallel code for multi-core systems.  The team has recently posted a new performance tuning tool,  the Intel Software Autotuning Tool (ISAT) that supports automatic searching for the near-optimal values of program parameters that have significant performance impact. Think of such examples as the cache-blocking factors in matrix computations, the task granularity in Threading Building Blocks, and the scheduling policy of OpenMP parallel constructs. The output is a tuned version of the program based on the searching results. This tool is easy to use with no compiler dependency.  You can<a href="http://software.intel.com/en-us/articles/intel-software-autotuning-tool/?cid=sw:sw:SW_AutoTune_Blog_JK3"> learn more and download the Intel Software Autotuning Tool </a>on Intel's Parallel Programming Community.  Check it out and let us know how it performs for you.</p>
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		<title>Jeff&#039;s Notebook: Optimally tune an algorithm, read Superscalar Programming 101 (Matrix Multiply)</title>
		<link>http://software.intel.com/en-us/blogs/2010/12/24/jeffs-notebook-optimally-tune-an-algorithm-read-superscalar-programming-101-matrix-multiply/</link>
		<comments>http://software.intel.com/en-us/blogs/2010/12/24/jeffs-notebook-optimally-tune-an-algorithm-read-superscalar-programming-101-matrix-multiply/#comments</comments>
		<pubDate>Fri, 24 Dec 2010 08:39:29 +0000</pubDate>
		<dc:creator>Jeff Kataoka (Intel)</dc:creator>
				<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[Superscalar Programming 101]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2010/12/24/jeffs-notebook-optimally-tune-an-algorithm-read-superscalar-programming-101-matrix-multiply/</guid>
		<description><![CDATA[This Summer, one of our Intel Black Belt Software Developers, Jim Dempsey, published a multi-part article on the Parallel Programming Community to help developers to enhance their Parallel Programming Skills:  Superscalar Programming 101 (Matrix Multiply).  Jim Dempsey discusses how to optimally tune a well known algorithm. He takes this algorithm and showcases the common method for parallelizing this [...]]]></description>
			<content:encoded><![CDATA[<p>This Summer, one of our Intel Black Belt Software Developers, Jim Dempsey, published a multi-part article on the Parallel Programming Community to help developers to enhance their Parallel Programming Skills:  <a href="http://software.intel.com/en-us/articles/superscalar-programming-101-matrix-multiply-part-1/?cid=sw:superscalar_PP_Blog_JK2">Superscalar Programming 101 (Matrix Multiply)</a>.  Jim Dempsey discusses how to optimally tune a well known algorithm. He takes this algorithm and showcases the common method for parallelizing this algorithm and then he outlines several different approaches  to parallelizing this algorithm.  The final method produces a fully cache sensitized approach to parallelizing this algorithm.  Jim's article is very detailed with some great code examples that I think you will find very useful.  He has gotten some good reviews by developers that have read this article.  I'd like to recommend reading this multi-part article.</p>
<p>Let me know what you think of Jim's article, <a href="http://software.intel.com/en-us/articles/superscalar-programming-101-matrix-multiply-part-1/?cid=sw:superscalar_PP_Blog_JK2">Superscalar Programming 101 (Matrix Multiply).</a></p>
<p><strong> </strong></p>
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