Video: Navigating the MEBx Menus of an Intel® vPro™ technology client (Intel® AMT)

Video: Taking a look at the IMSS Software on an  Intel® vPro™ Technology Client (Intel® AMT) 

Video: How to Configure and Un-configure an Intel® vPro™ technology client (Intel® AMT) inside the MEBx Menus

View these and give us some feedback.

Thanks

Kathy Farrel
Intel® vPro™ Developer Program Manager

Before I sign off here (on PPT – I am, still here in a new role and my blog will continue) I want to thank my cohost Clay Breshears for his support in this ride. His expertise, encouragement and exceptional sense of humor contributed heavily to the success of the show. Thanks to our outstanding guests for sharing the info that has drawn our audience. Special thanks to our crew: Jerry Makare, Technical Director, Intel Software Videos, Producer Josh Bancroft and Videographer Chris Davis,  for early morning shoots, patience through the technical challenges and for their continuing support (new phrase - for the love of Skype).

Extra thanks to Aaron Tersteeg, whose brainchild "Parallel Programming Talk" was and is. He is one of the most forward thinking people I know anywhere, whose wisdom and energy fuels a great deal of the goodness here at the Intel Software Network.  

Enjoy the video:

Direct Video Link: http://software.intel.com/en-us/blogs/2011/12/14/the-last-show-parallel-programming-talk-130-parallel-manifold-with-jim-dempsey/

Here is the video - at the bottom of this blog you will see topics discussed before our interview with Kath, (Including the Guide for Developing Multithreading Applications) and the questions asked during that interview along with additional info on CnC and our guest:

Here is the link to download the show:

http://software.intel.com/en-us/videos/channel/parallel-programming/parallel-programming-talk-129-kath-knobe/1266774979001 

It’s Tuesday and this is Parallel Programming Talk #129– Our guest is Intel Research Scientist Kath Knobe. We’ll be speaking with her in a few minutes.

Good morning Clay – I think we should talk a bit more about the GDMA – the new version of which was released on October 25 – last week.

1. For those who may not know – What is the Intel Guide for Developing Multithreaded Applications – what is it, who uses it and what does it contain?
2. When first published and what was the response?
3. How did you decide there needed to be some revisions and additions?
4. What is revised, what is new and where is it?
5. Anything new? (A reader asked for a downloadable pdf and now that is available for the guide as a whole and for each article as well.
6. The future of the guide?

And now for the News:

 SC11 is only a few weeks away. I guess that might be why there isn’t much new these past few weeks. I guess everyone is saving all the cool hardware and software announcements for the conference. Clay what will you be doing in Seattle for this year’s conference?

We’d like to hear from you – do you have a show idea, a listener question or do you have a prediction about who will be on the TOP500 list? Clay, what’s the best way for our viewers to let us know what they’re thinking?

Clay: They can send us email at parallelprogrammingtalk@intel.com

Kath Knobe is here to talk about Concurrent Collections Welcome to the show Kath Before we get into our topic and questions, can you tell us a little about yourself?

We’re talking about Concurrent Collections

• What is it?
• Advantages vs. disadvantages
• What was its origin and when? Were you trying to solve a problem? What was it?
• What kind of programmer uses CnC – and what for?
• To what does CnC lend itself?
• Easy to use? What kind of response have you gotten from users?
• What is in CnC’s future?
• How/where do you get it? / Where do our viewers learn more?

C++/CnC at Intel http://software.intel.com/en-us/articles/intel-concurrent-collections-for-cc/ 

The Concurrent Collections Programming Model. Burke, Knobe, Newton & Sarkar. Rice Technical Report TR 10-12. http://compsci.rice.edu/TR

Java/CnC at Rice University - http://habanero.rice.edu/cnc.html

Haskell/CnC at Intel and Indiana University -  http://hackage.haskell.org/package/haskell-cnc

Thank you Kath for being on the show.

If you have comments, questions, suggestions for guests or show topics that you think would be of interest, we’d love to hear from you.  Our email address is parallelprogrammingtalk@intel.com

Don’t forget our email address: drop us a line at parallelprogrammingtalk@intel.com

Remember – all’s well that’s parallel.

About Our Guest
Kathleen Knobe Kathleen Knobe worked at Compass (aka Massachusetts Computer Associates) from 1980 to 1991 where she designed compilers for a wide range of parallel platforms including those at Thinking Machines, MasPar, Alliant, Numerix, and several government projects. In 1991 she decided to finish her education. After graduating from MIT in 1997, she joined Digital Equipment’s Cambridge Research Lab (CRL). She stayed at CRL through the DEC/Compaq/HP mergers and CRL’s absorption into Intel. She currently works in Geoff Lowney’s group (Software Solutions Group / Developer Products Division / Technology Pathfinding and Innovation - SSG/DPD/TPI). Her professional interests remained focused on parallelism either through compiler technology and language design.

Her major projects include Data Optimization (compiler transformations for locality), the Subspace Model of computation (a compiler internal form for parallelism), Array Static Single Assignment form (a method of achieving for array and loop-base code the advantages that SSA has for scalars), Weak Dynamic Single Assignment form (a global method for eliminating overwriting of data to maximize scheduling flexibility), Stampede and Ganga (streaming methodologies) and Concurrent Collections (CnC).

http://cdsweb.cern.ch/record/1264113/

http://software.intel.com/en-us/videos/channel/parallel-programming/parallel-programming-talk-128-steve-lionel/1247156004001

It’s time for Parallel Programming Talk – this is show #128 We’ll be talking with friend of the show, Steve Lionel – Otherwise known as Dr. Fortran in a few minutes.
2. SC11 is only a few weeks away. I guess that might be why there isn’t much new these past few weeks. I guess everyone is saving all the cool hardware and software announcements for the conference. Clay, I know the TOP500 list will be released at SC11. Any bets on what will be in the #1 slot?
CLAY: I’d go with the current #1 system, the K Computer from Japan. It’s got too much of a performance lead to be overtaken in 6 months. Plus, it wasn’t completed when the last reported measurements were taken.

Kathy: We’d like to hear from you – do you have a show idea, a listener question or do you have a prediction about who will be on the TOP500 list? Clay, what’s the best way for our viewers to let us know what they’re thinking?

Clay: They can send us email at parallelprogrammingtalk@intel.com

And now it’s time for our guest Steve Lionel – It’s good to have you back again. Before we get to our subject Fortran – can you tell us a little bit about yourself for our new viewers.

Thanks Steve I understand there is some very good news for Fortran Developers.

• What is Fortran Studio XE 2011? What has there been in the past?
• Are there any new features that were not available before?
• Are there any differences between Fortran Studio XE 2011 and the Parallel Studio XE 2011 products?
• What version of Fortran is supported?
• Where can Fortran programmers get more information about Fortran Studio XE 2011?

If you have comments, questions, suggestions for guests or show topics that you think would be of interest, we’d love to hear from you. Send us an email with your thoughts to parallelprogrammingtalk@intel.com

Remember, programming genius is one percent inspiration, ninety-nine percent parallelism.

About or Guest

Steve Lionel -

News

1. The Guide for Developing Multithreaded Applications has been updated.

Changes include:

• 1-8 - Using AVX Without Writing AVX Code - New
• 3-5 - Optimizing Applications for NUMA - New
• 4-4 - Using Intel® Inspector XE 2011 to Find Data Races in Multithreaded Code - Revised
• 4-6 - Getting Code Ready for Parallel Execution with Intel® Parallel Composer - Revised
• 4-6 - Getting Code Ready for Parallel Execution with Intel® Parallel Composer - Revised
• 4-7 - Optimize Data Structures and Memory Access Patterns to Improve Data Locality - New

2. Intel Parallel Studio XE Service Pack 1 (Click What's New) was released on 08 SEP. The service pack contains numerous quality improvements and refinements to help further increase application performance. Notably it includes support for Cilk™ Plus v1.1, IEEE 754-2008, Intel Threading Building Blocks v4.0

3. And speaking of new tools, also released with the servceservice pack was the all new Intel® Fortran Studio XE 2011. This suite includes the latest versions of Intel® (Visual) Fortran Composer XE (this also includes the Intel® Math Kernel Library), Intel® VTune™ Amplifier XE and Intel® Inspector XE. Our guest next week will be Steve Lionel to talk about the new Fortran Studio XE 2011.

4. SC11 is only a few weeks away. This is the premier HPC conference in North America. Clay will be there. Look him up – I bet he’d give you an autograph.

Kathy: We’d like to hear from you – do you have a show idea, a listener question or maybe you’d like to be on our show. Clay, what’s the best way for our viewers to let us know what they’re thinking?

Clay: They can send us email at parallelprogrammingtalk@intel.com

Transitional Pause

Kathy: And now it’s time for our guest Paul Stravers – Chief Architect - Welcome Paul – before we get to the heart of the matter can you tell us a little bit about yourself?

Kathy – Thanks –let’s start with a statement on the Vector Fabrics Web site: “Making software work on modern complex multicore platforms can be an incredibly complicated task. vfEmbedded makes programming such as multicore SOC easy.” What is vfEmbedded?
Clay – next question and so on…

Kathy – Paul – thank you very much for spending a little time with us today. Where can our viewers learn more about vfEmbedded and Vector Fabrics. Add url

If you have comments, questions, suggestions for guests or show topics that you think would be of interest, we’d love to hear from you. Send us an email with your thoughts to

parallelprogrammingtalk@intel.com

Remember, Too many cooks spoil the broth and too many threads just slow things down.

About today’s guest

Paul Stravers is co-founder and Chief Architect at Vector Fabrics, where they specialize in tools to help you parallelize and map applications on multi-

Earlier, Paul was Principle Architect at Philips Research and NXP, working on multiprocessor architectures, coherent system caches, memory hierarchies, on-chip bus architectures, application partitioning and mapping, mixed-level simulators and performance modeling.

Before that, he worked at several R&D positions in California, Germany and the Netherlands. Paul holds a PhD in electrical engineering from Delft University of Technology.

The News

1. Intel Parallel Studio XE Service Pack 1 was released on 08 SEP. The service pack contains numerous quality improvements and refinements to help further increase application performance. Notably it includes support for Cilk™ Plus v1.1, IEEE 754-2008, Intel Threading Building Blocks v4.0
2. And speaking of new tools, also realeased with the serivce pack was the all new Intel® Fortran Studio XE 2011. This suite includes the latest versions of Intel® (Visual) Fortran Composer XE (this also includes the Intel® Math Kernel Library), Intel® VTune™ Amplifier XE and Intel® Inspector XE.
3. SC11 is right around the corner. This is the premier HPC conference in North America. Clay will be there. Look him up – I bet he’d give you an autograph.

These are the questions that were asked, and answered during our interview with Bill:

• What is Pilot?
• Why Pilot?
• Elements of abstraction
• Integrated deadlock Checker
• How Used in PP course
• How to get it – future implementation
• What’s with the fish?
Web site: http://www.uoguelph.ca/~gardnerw/research/ http://carmel.socs.uoguelph.ca/pilot
Kathy Thanks so much for meeting with us today Bill. We will send you the URL as soon as the blog and video are posted we will send you the URL.

If you have comments, questions, suggestions for guests or show topics that you think would be of interest write to is parallelprogrammingtalk@intel.com

About Our Guest
Bill Gardner is a faculty member in the School of Computer Science at the University of Guelph in Ontario, Canada. He teaches software development, embedded systems, and parallel programming. Based in the Modeling and Design Automation Group, his main research area is concurrent system synthesis from formal specifications.

We usually interview ISN Black Belt Developer, and well-known author Gaston Hillar at IDF and this year was no exception. In this show Gaston shares his enthusiasm about new Intel products including CPUs (especially Intel Atom), Developer Tools and a bigger empasis on the quality of the user experience.

Download Link - High Quality MP4 Video File (Large):

http://brightcove.vo.llnwd.net/pd18/media/740838651001/740838651001_1222636516001_PPT-125-V1.mp4

Here is a link to last year's interview: http://software.intel.com/en-us/articles/idf-2010-video-isn-black-belt-gaston-hillar-talks-about-his-new-book-professional-parallel-programming-with-c?wapkw=(gaston+hillar)

About our Guest - in his own words

Kathy

Download Link - High Quality MP4 Video File (Large):

http://brightcove.vo.llnwd.net/pd18/media/740838651001/740838651001_1217110322001_PPT-124-V1.mp4

Here's the video:

We will be talking with many ISN Parallel Programming Black Belt Developers - those are the cream of the community crop as it were - real coding gurus who not only know their stuff - they routinely reach out and help developers who don't have quite the experience that they do. This year there are ten Parallel Programming Community Black Belts attending - keep checking back for these videos that will be appearing on the Community in the days following IDF.

The charter members of this elite group are Igor Levicki and Jim Dempsey, from Serbia and good old Oshkosh Wisconsin respectively. Jim and Igor, don't forget your sunglasses (and a jacket). Other countries represented in our BB group include Argentina and Belgium. We are having our annual Black Belt meetup on Wednesday with a nice dinner planned. Intel Parallelism Guru James Reinders will be speaking at the dinner - always good to hear from James about what is on the horizon for parallelism, at Intel and around our industry.

This year's Forum promises to be another whirlwind of activity - Keynotes from Paul Otellini and Justin Ratner will be high points for sure.

Clay and I will also be supporting Intel Technical Consulting Engineer (and newest Community Black Belt Developers) Noah Clemons as he presents a truly unique hands-on lab. Called Intel® Faces of Parallelism Lab: Parallel Models for Multi/Many Core" (SFTL004) On Wednesday, Sept. 14 join anytime from 1-5pm to see how the latest Intel® silicon features are unlocked via Intel’s optimized Software Tools. You might win a Sony Internet TV! Read Clay's latest blog for more details.

Well, lots to do before leaving Monday afternoon - thank goodness it's only a 30-minute drive for me and I'll have time to catch my breath before my first appointment with the whirlwind on Tuesday morning. If you're there come and find me along with other ISN folks. We want to meet you and show you what is new.

It’s time for Parallel Programming Talk This is show  #121– Clay and I will be talking with Intel Software Architect Mike Voss

But first the news:

The News

There is now an open source implementation of Cilk(TM) Plus based on gcc 4.7. Can you explain why this is good news?  Information on how to contribute is at: http://software.intel.com/en-us/articles/contribute-to-intel-cilk-plus/ Source is at: http://software.intel.com/en-us/articles/download-intel-cilk-plus-source/ I’ll also include links to a couple of hot blogs on the subject – both are drawing high site traffic!

•  http://software.intel.com/en-us/blogs/2011/08/09/parallelism-as-a-first-class-citizen-in-c-and-c-the-time-has-come/ 
• http://software.intel.com/en-us/blogs/2009/08/03/hello-lambdas-c-0x-a-quick-guide-to-lambdas-in-c/

 The Intel Developer Forum is less than a month away– September 13-15 at the Moscone Center in San Francisco http://www.intel.com/idf/  Clay and I have some things planned – we’ll  both be interviewing folks – a few Parallel Programming Talk shows will be done and we will have them available for viewing shortly thereafter.  ISN is doing something new at IDF – we are sponsoring a lab, being run by our newest Community Black Belt Developer Noah Clemons.  

                           Faces of Parallelism Open Lab: Parallel Models for Multi/Many Core

•  Join this open lab whenever you want. It will be open from Wed, September 14 - 1:05 – 5:15pm. All levels of experience are welcome. You will experience Intel® Software Programming  Tools and the wide variety of programming models supported. This hands-on-lab provides attendees the opportunity to see how the latest Intel® silicon features are unlocked via Intel’s optimized Software Tools product line.  You will have the opportunity to provide feedback on your experience, by blog or video (we will provide everything needed)and those who choose to do so will be entered into a contest. Four prizes will be awarded. Don't miss this one.  

  Read more about the lab, contest, etc. Session ID: SFTL004

If you have comments, questions, suggestions for guests or show topics, news to share that you think would be of interest, we’d love to hear from you. Clay, where can they send those ideas?

K: Now for something we know you’ll really like – our guest.

Questions asked during the show:

• Welcome to Parallel Programming Talk – Michael. Before we get into the TBB Flow Graph discussion, could you tell us a little about yourself – background, what do you do at Intel
• C: In case our viewers don’t know, what is TBB and why are Flow Graphs important – how does this compare with the TBB Graph API? 

              M:Used to be called “the TBB graph API” is now the “TBB flow graph”.

• K: What is this used for?

               M:The TBB flow graph can express acyclic dependency graphs, as well as acyclic and cyclic messaging graphs.

• C: How long has this feature existed? Who has used it? What kind of response have you received?

              M: Has been a Community Preview feature since Intel® TBB 3.0 U5 (Dec 2010) and now is a full feature in TBB 4.0 (? September 2011 ?) Since Dec 2010, evaluated by customers across media, gaming,       financial services and technical computing

• K: What were customers doing before the flow graph?

              M: Forced apps in to the linear Intel® TBB pipeline, Built their own abstractions over Intel® TBB tasks, Or built their own thread-based graph libraries

• C: What can flow graphs be used for? Do you have any examples you can share?

              M:A flow graph is made of a graph object, nodes and edges.  The nodes may execute user code, buffer or direct messages.  The graph object is the parent of all of the tasks executing in the graph.  The edges make the connections between nodes explicit. 

Watch Video to see the examples

             M:Some apps that fit a flow graph can already be expressed using the TBB pipeline or a graphs of tasks

• If an app can be fit into a pipeline
  • the flow graph version and pipeline version usually have similar performance
  • The pipeline version will tend to require less code, since the edges are implicit and there is no need for join or split nodes
  • If an app can be fit into a graph of tasks
    • the flow graph version and task graph version usually have similar performance
    • the flow graph version will be simpler to implement and require less code
    • Many apps are impractical to express as a pipeline or graph of tasks, but can be handled by the TBB flow graph
• C:Can viewers try this out for themselves?
• K: Michael, thanks for being our guest today – how can our community members  learn more?

                    M: Lots of blogs will be available soon at http://software.intel.com/en-us/blogs/tag/flow_graph

If you have comments, questions, suggestions for guests or show, send those ideas    

To  parallelprogrammingtalk@intel.com

Today’s show was posted September 9. There will not be a new show on September 27.  We will have a number of recordings and special episodes available soon after. Weekly Tuesday morning streamed shows will resume taping on September 20 with a release on the following Friday. Watch the calendar on the Parallel Programming Home page for the latest info on Parallel Programming Talk and additional Community Events.

A wise old programmer once told me - a trouble parallelized is a trouble halved

Welcome to another edition of Parallel Programming Talk. This is show #120. 

Today’s guest is Tucker Taft from the Sofcheck Company – we’ll be talking with him shortly about a new programming language he has created.

 But first, What is Clay Thinking About? An interesting discussion about human memory - based on the question - are search engines making humans less smart?  What do you think? 

 The News

• Clay – big news - There's now an open source implementation of Cilk(TM) Plus based on gcc 4.7. Can you explain why this is good news? Related Links: http://software.intel.com/en-us/articles/contribute-to-intel-cilk-plus/ Source is at: http://software.intel.com/en-us/articles/download-intel-cilk-plus-source/ http://software.intel.com/en-us/blogs/2011/08/09/parallelism-as-a-first-class-citizen-in-c-and-c-the-time-has-come/ http://software.intel.com/en-us/blogs/2009/08/03/hello-lambdas-c-0x-a-quick-guide-to-lambdas-in-c/  
• The Intel Developer Forum is less than a month away– September 13-15 at the Moscone Center in San Francisco http://www.intel.com/idf/ Clay and I will be there – and will both be interviewing folks at IDF – a few Parallel Programming Talk shows will be done and we will have them available for viewing shortly thereafter.ISN is doing something new at IDF – we are sponsoring a lab, being run by our newest Community Black Belt Developer Noah Clemons. Faces of Parallelism Open Lab: Parallel Models for Multi/Many Core:Join this open lab whenever you want. It will be open from Wed, September 14 - 1:05 – 5:15pm. All levels of experience are welcome. You will experience Intel® Software Programming Tools and the wide variety of programming models supported. This hands-on-lab provides attendees the opportunity to see how the latest Intel® silicon features are unlocked via Intel’s optimized Software Tools product line.  You will have the opportunity to provide feedback on your experience, by blog or video (we will provide everything needed)and those who choose to do so will be entered into a contest. Four prizes will be awarded. You will not want to miss this one.Read more about the lab, contest, etc. Session ID: SFTL004
•  Threading Challenge - Intel® Threading Challenge 2011 Phase 1 Problem 2 Apprentice and Master Winners Announced.  Master Level Winner - Akshay Singh, India, Apprentice Level - Rick LaMont, USA
•  OOPSLA (Now a part of SPLASH - Systems, Programming, Languages and Applications: Software for Humanity.) October 22-27 in Portland – today’s guest is leading a panel discussion on “Multicore, Manycore, and Cloud Computing: Is a new programming language paradigm required?” http://splashcon.org/2011/program/panels/229-multicore-manycore-and-cloud-computing-is-a-new-programming-language-paradigm-required    

• T he Intel Academic Community will soon be hosting new rounds of microgrant funding to create parallel programming training material. The first round will be focused on Data Structures. If you’re in academia and have some ideas about teaching parallelism, go to the IAC microgrant site for more information. I’ll have the URL in the show notes or you can find it from the academic community homepage.

 If you have comments, questions, suggestions for guests or show topics, news to share that you think would be of interest, we’d love to hear from you. Clay, where can they send those ideas? parallelprogrammingtalk@intel.com

Now for the best part of the show - Today’s Guest - Sofchek's Tucker Taft. Welcome to PPT

1. What is ParaSail? - Parallel Specification and Implementation Language -- a new language that marries pervasive parallelism with formal methods. It is in the general bailiwick of languages like Java, C#, Scala, Clojure, F#, etc, though it is designed to be significantly simpler to learn and use, and take more advantage of multicore chips.

 2. How did it come about - were you trying to solve a problem? - I have been doing language design for the past 35 to 40 years.  Much of that has been associated with Ada (particularly Ada 95, where I was the technical lead for 5 years of a full-time design team), but I was also involved a bit with the hardware design language VHDL, with DARPA's Common Prototyping Language, and with lots of personal musings. 

Over the past few years I really felt I wanted to start over, and design a language to address the "multicore" revolution along with creating a language that was inherently safe and secure.

I tried to enlist various friends and colleagues in the venture, but alas they all seemed to have their own fish to fry.  So as an alternative I decided to start a Blog documenting the design process, both as a way to get the language "out there," but perhaps more importantly as a way to force me to put "pen to paper" (or the digital equivalent).

 The blog turned out to be a great mechanism for me, and the language ideas came fast and furious.  About a year ago things felt pretty solid, and I began giving talks and writing papers about ParaSail.  Most recently I gave a talk at OSCON 2011, and the cool thing was that the media picked up on it.  My blog which had been cruising along at about 25 hits per day, suddenly jumped up to 2000 on the day of my OSCON 2011 talk.

Of course it is back down a bit now, but the net effect is that I am even more encouraged that ParaSail is addressing an unmet need in the marketplace.

As far as parallelism, I believe that we programmers are fundamentally a lazy lot, and as long as it easier to write a sequential program than a parallel one, we will continue to write sequential programs.  ParaSail was designed with the goal to make it *harder* to write a sequential program.

The default is parallel, and if you want to force something to be done sequentially, you need to say so explicitly.

As far as safety and security, I have spent the past 10 years working on sophisticated static analysis technology used to find safety and security holes in programs by mathematical analysis rather than run-time testing.

I believe that it is now time to move advanced static analysis technology into the compiler, and use it to detect and eliminate all possible run-time errors (e.g. race conditions, null pointer derefs, array out of bounds, numeric overflow, assertion failures) at compile-time.  If the compiler can't prove your program is safe and secure, then it is illegal.

3. Who would want to use this and for what? Advantages, disadvantages? Easy to use?

This is designed for any programmer who is concerned with safety and security, and taking maximum advantage of parallelism so the programs are "future proofed" against the exponential growth in number of processors on the chip.

The language is specifically designed to be very "familiar" to current Java, C++, C#, Ada, ML, etc. programmers.  You should be able to sit down and read a ParaSail program on day one, and start programming soon thereafter.

ParaSail is very simple and uniform, using a very small number of concepts.

Fundamentally there are only four concepts: modules, types, objects, and operations.

All code is parameterized, in the sense of a generic template (or an ML functor), so there is no distinction between generic and non-generic code.

Parallelism is pervasive, but because the compiler worries about race conditions, it doesn't add to debugging complexity.

The prototype ParaSail compiler is getting pretty complete, and recently I have been writing a number of programs in ParaSail.

I have to say it is really fun to program in, and it gives one a tremendous sense of confidence that it is taking care of all safety and security concerns while creating a highly parallel program.

4. Does it take the place of anything else, does it complement another language?

ParaSail is a strongly typed language.  In that sense it is not expected to be used as a "scripting" language.  But for programs that are intended to be compiled into rock-solid executables that take full advantage of multicore, that's what ParaSail is great for.

5. How do viewers find out more?

I started a blog in September 2009 to document the design process: http://parasail-programming-language.blogspot.com

More info: http://groups.google.com/group/parasail-programming-language

------------------------

Join us next time – speaking of show times – following IDF we will resume the weekly show schedule for taping – but still – a new show every week. Watch the Parallel Programming home page calendar  for upcoming show information. And speaking of the home page – it’s got a new look and feel: http://software.intel.com/software/en-us/parallel - check it out and tell me what you think.

And please keep your cards and letters coming to parallelprogrammingtalk@intel.com.

One more thing before we go, – before you start threading, make sure your shoes are tied. (Don’t want any loose ends hanging around.)

More about Today's Guest:

S. Tucker Taft is Chairman and Founder of SofCheck, Inc., a company devoted to providing tools and technologies for helping to improve software quality and increase programmer productivity.  From 1990 to 1995, Mr. Taft served as the lead designer of the Ada 95 programming language.  In 2001, he led the architecture and development effort of the J2EE/XML-based Mass.gov portal for the Commonwealth of Massachusetts.

 In 2002, Mr. Taft founded SofCheck.  From 2001 to thepresent, Mr. Taft has been a member of the ISO Rapporteur Group that developed Ada 2005, and more recently is finalizing Ada 2012. In September 2009 Mr. Taft embarked on the design of ParaSail, Parallel Specification and Implementation Language, a new language that marries pervasive parallelism with formal methods.

Mr. Taft has published a number of papers and given numerous presentations on programming language design, software development environments, and advanced static analysis technology. His publications include "Ada 9X, A Technical Summary," Communications of the ACM, Nov. 1992, Vol 35, Issue 11. "High Quality Programming Languages," 12^th Annual Software Technology Conference, Salt Lake City, Utah, April/May 2000, and "Making Static Analysis a Part of Code Review," embedded-computing.com, June 2009.

Mr. Taft received an A.B. Summa Cum Laude degree from Harvard University, where he has since taught compiler construction and programming language design.

S. Tucker Taft is Chairman and Founder of SofCheck, Inc., a company devoted to providing tools and technologies for helping to improve software quality and increase programmer productivity.  From 1990 to 1995, Mr. Taft served as the lead designer of the Ada 95 programming language.  In 2001, he led the architecture and development effort of the J2EE/XML-based Mass.gov portal for the Commonwealth of Massachusetts.

 In 2002, Mr. Taft founded SofCheck.  From 2001 to thepresent, Mr. Taft has been a member of the ISO Rapporteur Group that developed Ada 2005, and more recently is finalizing Ada 2012. In September 2009 Mr. Taft embarked on the design of ParaSail, Parallel Specification and Implementation Language, a new language that marries pervasive parallelism with formal methods.

Mr. Taft has published a number of papers and given numerous presentations on programming language design, software development environments, and advanced static analysis technology. His publications include "Ada 9X, A Technical Summary," Communications of the ACM, Nov. 1992, Vol 35, Issue 11. "High Quality Programming Languages," 12^th Annual Software Technology Conference, Salt Lake City, Utah, April/May 2000, and "Making Static Analysis a Part of Code Review," embedded-computing.com, June 2009.

Mr. Taft received an A.B. Summa Cum Laude degree from Harvard University, where he has since taught compiler construction and programming language design.

It’s time for another episode of Parallel Programming Talk #119– Clay and I will be talking with  our guest NERSC Director Kathy Yelick in a few minutes. But first…

What is Clay Thinking About?

·         Spelling and grammar checkers (watch the video to hear what Dr. Breshears had to say on the subject)

Now for the News

·         The Virtual School of Computational Science and Engineering (VSCSE) is offering a hands-on course for graduate students this summer:

o   Proven Algorithmic Techniques for Manycore Processors (Aug 15-19)This course will be delivered to numerous sites nationwide—including the National Center for Supercomputing Applications at the University of Illinois at Urbana-Champaign—using high-definition video conferencing technologies. Students at all sites will be able to work with a cohort of fellow computational scientists, have access to local teaching assistants, and interact virtually with course instructors.

Registration for each weeklong course is $100. For students attending at NCSA/Illinois, however, the $100 fee will be waived.  Please visit www.vscse.org  for more information or www.hub.vscse.org   to register.

Siggraph 2011

·         August 7 – 11, 2011 Vancouver, BC, Canada (map) Please note the correction – in the show Kathy mistakenly  stated that this was taking place September 7-11.

Description and more information:  http://www.siggraph.org/s2011/

Of course the Intel Developer Forum is not far off – September 13-15 at the Moscone Center in San Francisco http://www.intel.com/idf/  Attend IDF San Francisco. Where Brilliant Minds Rub Elbows.

After a successful pilot program earlier this year, The Intel Academic Community will soon be hosting new rounds of microgrant funding to create parallel programming training material. As we’re taping today’s show there are no details about the program. If you’re in academia and have some ideas about teaching parallelism, keep an eye on the IAC microgrant site (http://software.intel.com/en-us/articles/parallelism-content-awards/) for more information when it’s available.

  Both students and faculty are eligible for participation.

Don’t forget – if you have comments, questions, suggestions, news items or other announcements, we’d like to hear them.  Send us an email to parallelprogrammingtalk@intel.com

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Now for our Guest

Kathy Yelick is  Director of the National Energy Research Scientific Computing Center.  She told us all about the Hopper Machine and Petascale Computing.

Questions Asked

1.       Could you take a few minutes and tell us about yourself?

2.       What is NERSC? What is its purpose?

3.       We contacted you after reading about your center’s new Petascale computing installation. For our audience members that might not know – What is Petascale?

4.       What kinds of problems require Petascale computers? (Can you give some examples?)

5.       Who are the users of this computer?

6.       Can you tell our audience about the Hopper computer?

7.       Now what about Exascale – is that in the future?

More info

 http://www.nersc.gov/news-publications/news/nersc-center-news/2011/hopper-among-world-s-top-10-fastest-computers/

Before we sign off today I need to tell you, this show’s on-demand video was to be released on the Intel Software Network Friday, August 5^th  (was posted 8/8 due to technical difficulties) and will be our last show of the season.  Lots of vacations are putting us on hiatus for a few weeks but we will be back after Labor Day with perhaps one show before we head to IDF. Keep checking back on the community’s PPT page. Do you have comments, suggestions for show guests or topics?  please send them to us in an email ParallelprogrammingTalk@Intel .com

More about our Guest

Kathy Yelick received her Bachelors, Masters, and Ph.D. in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology, 1985, 1985, 1991, respectively.