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	<title>Blogs &#187; Michael Wrinn (Intel)</title>
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		<title>International software workshop in Beijing</title>
		<link>http://software.intel.com/en-us/blogs/2010/08/19/international-software-workshop-in-beijing/</link>
		<comments>http://software.intel.com/en-us/blogs/2010/08/19/international-software-workshop-in-beijing/#comments</comments>
		<pubDate>Fri, 20 Aug 2010 00:32:45 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2010/08/19/international-software-workshop-in-beijing/</guid>
		<description><![CDATA[I had the privilege to participate in a recent workshop at Peking University, a summer school on "global distributed software development", sponsored by an interesting organization called CPATHi18n, combination of Chinese and American universities, and the USA's National Science Foundation. Students (and these really were students -- more on that in a moment) came from [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://software.intel.com/en-us/blogs/wordpress/wp-content/uploads/2010/08/cpath2.jpg"><img class="alignleft size-medium wp-image-17929" src="http://software.intel.com/en-us/blogs/wordpress/wp-content/uploads/2010/08/cpath2-143x300.jpg" alt="" width="143" height="300" /></a> I had the privilege to participate in a recent workshop at Peking University, a summer school on "<a href="http://www.cpathi18n.org/">global distributed software development</a>", sponsored by an interesting organization called CPATHi18n, combination of Chinese and American universities, and the USA's National Science Foundation. Students (and these really were students -- more on that in a moment) came from China (of course -- about a third of the total), Korea, Japan, Canada and USA; instructors included both professors and industry types such as me (I met some from Microsoft Labs and IBM).</p>
<p>The "distributed" in the workshop title refers to the "distributed development", as in multi-location teams, not "distributed software", as in, say, grid applications. Nevertheless, the organizers considered parallel software development (as in "parallel software") to be so important they invited me to deliver four afternoon sessions focusing on the topic, so I flew to Beijing with a laptop full of powerpoint erudition on threading building blocks (generics, concurrent containers, scalable memory allocators) and their goodness in realizing classical algorithms -- old favorites like convolution, prefix scan, and quicksort. This somewhat stodgy preparation survived, like all battle plans, about one minute into the actual engagement. My normal workshop audience is professors, or sometimes working professionals, but here before me were  actual university students,  mostly the undergraduate variety. Not since my own grad school days had I been before such an audience, which had faded in memory to faint rumor. Ok, time for a new plan.</p>
<p>Luckily, the connection from campus (in Beijing) to Intel's Manycore Testing Lab (several 32-core systems in Dupont, Washington) was good, so we proceeded with coding exercises, starting with a parallel "hello, world" and moving up from there. As the week progressed, we also commandeered local systems to install and build parallel versions of "Destroy the Castle", and Intel game demo. The emphasis on coding turned out to be key, and it didn't hurt to have a game demo to break up the calculations of pi.  Key learning for me (a "duh", in retrospect): keep students busy, with solvable puzzles. Hmm, maybe this approach can work for audiences of professors, too?</p>
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		<title>Wisdom of crowds? House, and ground loops.</title>
		<link>http://software.intel.com/en-us/blogs/2009/09/29/wisdom-of-crowds-house-and-ground-loops/</link>
		<comments>http://software.intel.com/en-us/blogs/2009/09/29/wisdom-of-crowds-house-and-ground-loops/#comments</comments>
		<pubDate>Tue, 29 Sep 2009 21:37:38 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Uncategorized]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2009/09/29/wisdom-of-crowds-house-and-ground-loops/</guid>
		<description><![CDATA[There is a standing literature for "crowd sourcing";  an early example is Surowiecki's 2004 The Wisdom of Crowds, which asserts that groups can be "smarter than the smartest people in them". Last night's episode of House played on this notion, with a patient soliciting diagnostic information from the online crowd. As dramatized, it turned out that [...]]]></description>
			<content:encoded><![CDATA[<p>There is a standing literature for "crowd sourcing";  an early example is Surowiecki's 2004 <em>The Wisdom of Crowds</em>, which asserts that groups can be "smarter than the smartest people in them".</p>
<p>Last night's episode of <em>House</em> played on this notion, with a patient soliciting diagnostic information from the online crowd. As dramatized, it turned out that one particular response was pivotal -- but the rest were irrelevant, or worse.</p>
<p>Recently, preparing to entertain a large, very technical audience on the topic of Intel Threading Building Blocks, I connected my laptop to the auditorium projector, only to find the image wavering, in that slow subtle crawl toward seasickness; clearly, we could not proceed without remedy. The crowd voiced several suggestions, but one, in particular, was pivotal: "Ground loop". Huh - out here in the wild? I'd thought of those, if at all, as eccentric creatures lounging on the grass in a Maurice Sendak illustration. But that was answer, and pulling the laptop power plug cleared the problem.</p>
<p>In neither case, fictional nor anecdotal, was there any "crowd wisdom"; rather, it was the single, correct contribution which mattered. I'm inclined to think this is how it normally goes, the "crowd" merit being an increase in sample size, raising the odds of finding that one smart individual. (Of course, I'd also dismissed ground loops as college lab contrivances.)</p>
<p>As we read and contribute to our online communities, here at ISN and elsewhere, are we looking for crowd wisdom, or for those occasional nuggets of individual brilliance?</p>
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		<title>SIGCSE thoughts: Preparing Students for Ubiquitous Parallelism</title>
		<link>http://software.intel.com/en-us/blogs/2009/04/01/sigcse-thoughts-preparing-students-for-ubiquitous-parallelism/</link>
		<comments>http://software.intel.com/en-us/blogs/2009/04/01/sigcse-thoughts-preparing-students-for-ubiquitous-parallelism/#comments</comments>
		<pubDate>Wed, 01 Apr 2009 23:27:33 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[Software Tools]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2009/04/01/sigcse-thoughts-preparing-students-for-ubiquitous-parallelism/</guid>
		<description><![CDATA[The 2009 SIGCSE conference was my second, and I was alert for changes, one year on, in awareness and attitudes toward parallel computing. These turned out to be profound, noticeable and widespread. In 2008, you'd meet suprise (Parallel computing is already here?), complacency (Parallel computing might be important in the future) and skepticism (Parallel computing is always important in the [...]]]></description>
			<content:encoded><![CDATA[<p>The 2009 SIGCSE conference was my second, and I was alert for changes, one year on, in awareness and attitudes toward parallel computing. These turned out to be profound, noticeable and widespread.</p>
<p>In 2008, you'd meet suprise (<em>Parallel computing is already here?</em>), complacency (<em>Parallel computing might be important in the future</em>) and skepticism (<em>Parallel computing is always important in the future</em>). In 2009, I heard none of this; comments were more like, <em>What's the recommended model?</em> <em>Do we introduce this early or late?</em> <em>Where are the textbooks?</em> and (spoken softly, when no one was looking), <em>How do I learn this myself?</em></p>
<div id="attachment_6430" class="wp-caption aligncenter" style="width: 310px"><a href="http://software.intel.com/en-us/blogs/wordpress/wp-content/uploads/2009/04/sigcse_panel.jpg"><img class="size-medium wp-image-6430 " src="http://software.intel.com/en-us/blogs/wordpress/wp-content/uploads/2009/04/sigcse_panel-300x109.jpg" alt="" width="300" height="109" /></a><p class="wp-caption-text">Preparing Students for Ubiquitous Parallelism: Profs Wittman (Purdue), Harvey (Berkeley) and Murphy (Contra Costa) descibe their approaches (I&#39;m listening, on the right).</p></div>
<p>Thanks to organizer Dan Ernst (Wisconsin), I had the privilege of participating in the panel discussion of this blog entry's title: Preparing Students for Ubiquitous Parallelism. The other panelists, pictured here, represented some of the parallel curriculum efforts at Purdue, Berkeley, Contra Costa Community College, and also the <a href="http://sc09.sc-education.org/about/index.php">SC Education workshop series</a> (which specifically address the question, how do professors themselves learn this stuff). We heard about parallelism taught in the first semester, using Scheme, in the first year (as an experiment), using Java threads, and to adjacent disciplines such as science and engineering, using C on clusters. Audience members related their own experiments and challenges, many pivoting around the inertia of university curriculum change, and (again) scarcity of introductory texts.</p>
<p>On textbooks, I'll offer this: parallel systems are the only ones that current students will ever see, in their careers. That ubiquity impacts nearly all traditional CS topics, well beyond programming fundamentals. We don't need "intro to parallel" textbooks, but instead introductory books which incorporate parallelism as a routine component -- changes will come, for example, in the implementation of classical algorithms, and in the design choices for data structures. Authors: an opportunity!</p>
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		<title>Top 10 challenges in parallel computing</title>
		<link>http://software.intel.com/en-us/blogs/2008/12/31/top-10-challenges-in-parallel-computing/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/12/31/top-10-challenges-in-parallel-computing/#comments</comments>
		<pubDate>Thu, 01 Jan 2009 07:02:58 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/12/31/top-10-challenges-in-parallel-computing/</guid>
		<description><![CDATA[In the spirit of yearend, top 10 lists, here is one for parallel computing. A version appeared earlier this year in a paper with Tim Mattson, who's talked about this in other forums and gets full credit for its collation; it reflects thinking by some of the folks here, and is worth posting for discussion. Note the list is for [...]]]></description>
			<content:encoded><![CDATA[<p>In the spirit of yearend, top 10 lists, here is one for parallel computing. A version appeared earlier this year in a <a href="http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?tp=&amp;arnumber=4555772&amp;isnumber=4555759">paper</a> with Tim Mattson, who's talked about this in other forums and gets full credit for its collation; it reflects thinking by some of the folks here, and is worth posting for discussion. Note the list is for parallel <em>computing</em>, so encompasses hardware, tools, and design considerations as well as programming. In priority order:</p>
<ol>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Finding concurrency in a program - how to help programmers “think parallel”?</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Scheduling tasks at the right granularity<span style="yes;"> </span>onto the processors of a parallel<span style="yes;"> </span>machine.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">The data locality problem: associating data with tasks and doing it in a way that our target audience will be able to use correctly.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Scalability support in hardware: bandwidth and latencies to memory plus interconnects between processing elements.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Scalability support in software: libraries, scalable algorithms, and adaptive runtimes to map high level software onto platform details.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Synchronization constructs (and protocols) that enable programmers write programs free from deadlock and race conditions.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Tools, API’s and methodologies to support the debugging process.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Error recovery and support for fault tolerance.</span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Support for good software engineering practices: composability</span></span><span style="Times New Roman;">, incremental parallelism, and code reuse.</span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Support for portable performance. What are the right models (or abstractions) so programmers can write code once and expect it to execute well on the important parallel platforms?</span></span></div>
</li>
</ol>
<p class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">Reactions, please! Some things to consider:</span></span></p>
<ul>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;"><span style="x-small;">We make no mention of power consumption - is that reasonable? How would the power challenge be phrased, and where would it slot into the list?<br />
 </span></span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;">Data locality (#3) is intimately tied to scalability (#4). As systems become heterogeneous, with an assortment of different latencies among elements, how can we reconcile this tuning to portability (#10)?<br />
 </span></div>
</li>
<li>
<div class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;">Are we underestimating the importance of composability, so innocently tucked into "good software engineering" (#9)? And by the way, how would you teach that concept to university students, and in which course?</span></div>
</li>
</ul>
<p class="MsoListNumber2" style="list 30.25pt;"><span style="Times New Roman;">Lots more -- let's pick it up in 2009. Happy New Year to all!</span></p>
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		<title>Parallel Education Panel discussions -- 2008 roundup, recurring themes</title>
		<link>http://software.intel.com/en-us/blogs/2008/12/31/parallel-education-panel-discussions-2008-roundup-recurring-themes/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/12/31/parallel-education-panel-discussions-2008-roundup-recurring-themes/#comments</comments>
		<pubDate>Thu, 01 Jan 2009 05:55:14 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/12/31/parallel-education-panel-discussions-2008-roundup-recurring-themes/</guid>
		<description><![CDATA[With the video posted earlier this month (December, still, as I write here) of the SC 08 Education Birds of a Feather, There Is No More Sequential Programming, So Why Are We Still Teaching It?, I got to review that BoF for memorable nuggets (see it listed here, parts 1 through 7), and noticed themes [...]]]></description>
			<content:encoded><![CDATA[<p>With the video posted earlier this month (December, still, as I write here) of the SC 08 Education Birds of a Feather, <a href="http://scyourway.nacse.org/conference/view/edu_cl101">There Is No More Sequential Programming, So Why Are We Still Teaching It?</a>, I got to review that BoF for memorable nuggets (see it listed <a href="http://software.intel.com/en-us/videos/list/1/1">here</a>, parts 1 through 7), and noticed themes which recurred at similar sessions throughout 2008. Summarizing, with my own quick takes:</p>
<ul>
<li><em>this shift to parallel systems is disruptive; does industry really expect academia to invest all the effort needed to revamp its comfortably-established approach to teaching computational sciences?<br />
</em>Yes, and it's very much in our interest to help as effectively as possible. The SC 08 BoF (and related followups at the show) demonstrated consistent motivation among industry stalwarts: weighing in with Intel were NVidia, Sun, AMD and Microsoft, all alert to the importance of this educational shift.<br />
 </li>
<li><em>isn't this parallelism thing just another passing fad?</em><br />
No. (<em>pace</em>, <a href="http://www.informit.com/articles/article.aspx?p=1193856">Donald Knuth</a>)<br />
 </li>
<li><em>isn't parallelism an old story, well-mined by the HPC crowd?<br />
</em>Partly true. Certain algorithms in specialized fields do indeed run successfully on massively parallel systems, and some of the learnings there may find broader application.<br />
 </li>
<li><em>ok, so when should we introduce concurrency?<br />
</em>As soon as we introduce computing -- it's a normal, ubiquitous part of the discipline. This is not the same as pounding intro students with pthreads.<br />
 </li>
<li><em>but what do we take out of the curriculum, to make room for parallel programming?<br />
</em>Wrong question. Traditional topics survive, but get revamped to comprehend concurrency. Lots more work, but what a terrific opening to overhaul the whole approach (one panelist asserted the curriculum had "ossified in the 1970s". And didn't I hear something about declining enrollments?)<br />
 </li>
<li><em>there are so many models -- SIMD, SPMD, threads, messages, etc -- which one to choose?<br />
</em>Whichever conveys key concepts, and affords hands-on practice. At more advanced levels, offer vividly contrasting approaches (concurrency models in declarative vs imperative, say, or shared state vs shared-none).<br />
 </li>
<li><em>some schools are onto this already, and share their course content; could someone please provide guidance: what fits where, how good is it, who else uses it, etc?</em><br />
Excellent idea! Expect more along these lines in 2009.</li>
</ul>
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		<title>Creating a Pattern Language for Parallel Programming: the evolving view from Berkeley</title>
		<link>http://software.intel.com/en-us/blogs/2008/12/08/creating-a-pattern-language-for-parallel-programming-the-evolving-view-from-berkeley/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/12/08/creating-a-pattern-language-for-parallel-programming-the-evolving-view-from-berkeley/#comments</comments>
		<pubDate>Tue, 09 Dec 2008 00:58:54 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[Software Tools]]></category>
		<category><![CDATA[Add new tag]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/12/08/creating-a-pattern-language-for-parallel-programming-the-evolving-view-from-berkeley/</guid>
		<description><![CDATA[One day after its official opening last week, Berkeley's ParLab hosted an informal workshop on writing design patterns -- specifically, parallel design patterns. Participants were a diverse group, from academics (profs and grad students), research labs, and industry; prior pattern-writing experience ranged from guru to utter novice (I filled that particular slot in the roster). We were [...]]]></description>
			<content:encoded><![CDATA[<p>One day after its official opening last week, Berkeley's <a href="http://parlab.eecs.berkeley.edu/">ParLab</a> hosted an informal workshop on writing design patterns -- specifically, <strong>parallel design patterns</strong>. Participants were a diverse group, from academics (profs and grad students), research labs, and industry; prior pattern-writing experience ranged from guru to utter novice (I filled that particular slot in the roster).</p>
<p>We were guided by <a href="http://st-www.cs.uiuc.edu/users/johnson/">Ralph Johnson</a>, coauthor of the original bible of this regime, <span class="Apple-style-span" style="0;"><em>Design Patterns</em>:<em> Elements of Reusable Object-Oriented Software,</em> as well as <a href="http://www.eecs.berkeley.edu/~keutzer/">Kurt Keutzer</a> and <a href="http://www.inkdrop.net/tgmattson/tim/index.htm">Tim Mattson</a> (coauthor, <em>Patterns for Parallel Programming</em>). </span></p>
<p><span class="Apple-style-span" style="0;">Ok, so...why is this interesting? Consider: the present state of parallel programming looks a lot like that of object-oriented programming in the early 1990s -- a small number of practioners understand and use it, but the overall profession looks on with anxiety. The <em>Design Patterns</em> approach helped to shove OO into the mainstream; could it do so again for parallel programming?</span></p>
<p><span class="Apple-style-span" style="0;">To test this premise, a project has been launched to build up an integrated, coherent set of patterns useful for exposing high-level constructs to concurrency -- a pattern language, as opposed to a collection of patterns. Kurt and Tim have proposed a layer of structural and computational patterns, integrating to one or more an underlying layers of concurrency patterns. We presented a detailed snapshot of this view at the recent</span> <a href="http://www.iccad.com/2008/index.html">ICCAD</a>; slides from that tutorial are here: <a href="http://cid-dc21e49d9194210d.skydrive.live.com/browse.aspx/ICCAD%202008%20Tutorials/Tutorial%202">Architecting Parallel Software</a>.</p>
<p>This is going to take a lot of savvy and effort to get right, so the project has been opened up for viewing and commentary by all:<br />
<a href="http://parlab.eecs.berkeley.edu/wiki/patterns">Berkeley Pattern Language for Parallel Programming</a>.<br />
Participation welcome!</p>
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		<title>Ranking concurrency courseware -- Digg it?</title>
		<link>http://software.intel.com/en-us/blogs/2008/11/25/ranking-concurrency-courseware-digg-it/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/11/25/ranking-concurrency-courseware-digg-it/#comments</comments>
		<pubDate>Wed, 26 Nov 2008 02:43:41 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/11/25/ranking-concurrency-courseware-digg-it/</guid>
		<description><![CDATA[One excellent trend in university practice is the posting of course content, usually under a Creative Commons arrangement, for use by any and all. This is true, as well, for the growing and very important portfolio for parallel programming, or more broadly, concurrency.  In addition to the many universites doing this, key industry players such as Google, [...]]]></description>
			<content:encoded><![CDATA[<p>One excellent trend in university practice is the posting of course content, usually under a Creative Commons arrangement, for use by any and all. This is true, as well, for the growing and very important portfolio for parallel programming, or more broadly, concurrency.  In addition to the many universites doing this, key industry players such as Google, Microsoft, Sun, IBM, NVidia, and many others post excellent material online. Here at Intel we, too, maintain a similar repository, created by us and others,  available to any academic professional who cares to sign up with us (no cost involved, btw).</p>
<p>At SC 08 last week, in several forums, I heard variations on this comment: Ok, so there's content out there, how do I know it's any good? And whether it's suitable for my (students') needs? Steve Heller, from Sun, offered an intriguing solution: could we introduce a citation practice, analogous to that used in research publications, where curriculum content sources are credited? As in research, the more-cited content could be presumed better, or at least more useful. I like this suggestion a lot, but wonder about the timeframe and infrastructure challenges involved to pull this off.</p>
<p>I posed this later to Scott Apeland, Director of Intel's Developer Network, and he immediately yanked me from the 19th century to the 21st: wouldn't a web tool handle this? Yes...duh. I check Digg every day, but simply hadn't made the connection. All content is passed around by web, so why not have the community rank things there, as well? There are enough "digg-like" tools available (Pligg, PHPDug, etc) that a specialized ranking of parallel-computing course content could be created and maintained. Thoughts? Anyone already doing this??</p>
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		<title>IDF Concurrency panel follow up -- performance fundamentals matter</title>
		<link>http://software.intel.com/en-us/blogs/2008/08/29/idf-concurrency-panel-follow-up-performance-fundamentals-matter/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/08/29/idf-concurrency-panel-follow-up-performance-fundamentals-matter/#comments</comments>
		<pubDate>Fri, 29 Aug 2008 22:37:07 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>
		<category><![CDATA[concurrency]]></category>
		<category><![CDATA[idf]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/08/29/idf-concurrency-panel-follow-up-performance-fundamentals-matter/</guid>
		<description><![CDATA[Our IDF panel (officially, the Academic Community Multi-core Programming Roundable) brought some lively points of view, and at least one recurrent theme. First, the points of view: Dan Garcia gave a quick overview of the UC Berkeley approach; they really *do* get the new kids coding a version of MapReduce - in the first school [...]]]></description>
			<content:encoded><![CDATA[<p>Our IDF panel (officially, the Academic Community Multi-core Programming Roundable) brought some lively points of view, and at least one recurrent theme. First, the points of view:</p>
<p>Dan Garcia gave a quick overview of the UC Berkeley approach; they really *do* get the new kids coding a version of MapReduce - in the first school term. They do so in the language Scheme, which presents two distinct advantages: it levels the playing field, taking care of the issue of the students' broad range of prior coding experience (no one knows Scheme, apparently), and also, a functional language like Scheme is a very natural way to express MapReduce (4 lines of code, in fact). However -- and I view this as very important -- the curriculum quickly progresses from this academic level through Java and then to C, bringing in the corresponding concurrency model along the way. Students thus, in one school year, see the range of abstractions, right down to levels which expose the underlying architecture, with access to performance details. (Dan's slides are posted: <a href="http://www.cs.berkeley.edu/~ddgarcia/teaching/talks/2008-08-20-IDF-Educators-Panel/">Infusing Concurrency into the Intro CS Undergraduate Curricula</a>).</p>
<p>Tom Murphy reminded us that not all software practitioners arrive from computer science departments; in fact, a great deal of coding goes on in application domains such as physical sciences, biology, engineering, and even social sciences, where performance is a key requirement -- could we please keep them in mind?</p>
<p>Charles Leiserson (from MIT) <a href="http://software.intel.com/en-us/blogs/2008/08/13/software-concurrency-for-undergrads-panel-discussion-at-idf/#comment-14629">posted</a> to us that performance motivates parallelism, but performance treatments have been evaporating from CS training over the past decade.</p>
<p>Which brings us to the recurrent theme: performance. The audience, mainly from industry, certainly picked it up; several identified themselves as hiring managers, and lamented the general ignorance of performance and architecture details. At least one of them said he prefers to interview only EE graduates - for software jobs - since CS students typically do not bring what his company needs (the industries represented here were quite varied: search engine, medical instruments, cluster consulting etc).</p>
<p>I wonder if the academic computing universe is splitting into two camps: those where students deal directly with architecture, low-level languages, concurrency, and performance, and those where students stay at a higher level of abstraction (typically expressed with Java or Python)?<br />
And, if that division is true, is that ok with everyone?</p>
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		<title>Software Concurrency for undergrads? Panel discussion at IDF</title>
		<link>http://software.intel.com/en-us/blogs/2008/08/13/software-concurrency-for-undergrads-panel-discussion-at-idf/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/08/13/software-concurrency-for-undergrads-panel-discussion-at-idf/#comments</comments>
		<pubDate>Thu, 14 Aug 2008 06:52:22 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/08/13/software-concurrency-for-undergrads-panel-discussion-at-idf/</guid>
		<description><![CDATA[The Intel Developer Forum, in San Francisco August 19-21, brings this year a series of talks and workshops of particular interest to the academic community: a chalk talk on research collaboration in parallel computing, a technical session on expressing parallelism, a threading self-paced lab - details of these and more may be found here. One of these [...]]]></description>
			<content:encoded><![CDATA[<p>The <a href="http://www.intel.com/idf/?cid=cim:ggl|idf_home|k4EFF|s">Intel Developer Forum</a>, in San Francisco August 19-21, brings this year a series of talks and workshops of particular interest to the academic community: a chalk talk on research collaboration in parallel computing, a technical session on expressing parallelism, a threading self-paced lab - details of these and more may be found <a href="http://isccontent.intel.com/articles/eng/3727.htm">here</a>.</p>
<p>One of these is a panel discussion, <strong>Academic Community Multi-core Programming Roundtable</strong>, where we'll address the positioning of multi-core (more broadly, parallel) computing in undergraduate CS courses. We are fortunate to have two panelists with uniquely broad points of view, each from his own school, and from national-level efforts:</p>
<p><a href="http://www.eecs.berkeley.edu/Faculty/Homepages/garcia.html">Dan Garcia</a>  teaches at UC Berkeley, and has developed curricula to teach concurrency to *introductory* students, in the first 3 CS courses; topics range from a functional implementation of MapReduce, right through pthreads and MPI. Part of these UCB efforts are documented in the paper, <a href="http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-34.html">Infusing Parallelism into Introductory Computer Science Curriculum using MapReduce</a>. Beyond his immediate campus, Dan is also active in education: he is a member of the ACM Education Board, and has presented every year at SIGCSE since 2001.</p>
<p><a href="http://contracosta.edu/cs/murphy/">Tom Murphy</a> teaches at Contra Costa College, where he chairs the department and covers a range of courses in theory and practice. In addition to this role, Tom is seriously involved, as organizer and instructor, with the <a href="http://sc08.sc-education.org/workshops/index.php">SC Education Outreach</a> (a part of <a href="http://computationalscience.org/">NCSI</a>, the National Computational Science Institute), delivering summer workshops in parallel computing to college professors.</p>
<p>Our third panelist is your humble blog author here, <a href="http://www3.intel.com/cd/corporate/education/apac/eng/aaf08/spkrsbio_abst/track3/397002.htm">Michael Wrinn</a>. I'll join this distinguished cast as a voice from industry, where I've enjoyed a role in recent years of working with academia on fostering parallel computing in education. Scot Buck, Intel's Director of University Relations for Intel Research, will provide referreeing services, and keep things (more or less) civil.</p>
<p>While coming from different points on the computing education spectrum, the panelists are all concurrency "evangelists", in the sense that we practice and teach parallel programming, and suspect that everyone else should too. To me, a CS degree based solely on sequential, von Neumann techniques is starting to resemble a degree in CS history: interesting, somewhat important, but ignorant of the key design of modern computing platforms. Of course, there are other points of view -- no less than Donald Knuth <a href="http://www.informit.com/articles/article.aspx?p=1193856">states</a>: "I won’t be surprised at all if the whole multithreading idea turns out to be a flop...a pipe dream".</p>
<p>So, my academic friends, where do you stand on this matter, and how does that influence your teaching content? How soon should it be introduced, and how much is enough? How important is the choice of implementation model?</p>
<p>Please join us at this IDF Panel discussion - to challenge us, to share your experiences, plans or frustrations, and to let us know what we could to do help, in contending with the computing switch to concurrent platforms. There's a <a href="http://isccontent.intel.com/articles/eng/3727.htm"><strong>free, 3-day IDF pass</strong></a> available for professors interested in attending; I look forward to seeing you there!</p>
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		<title>Pushing Concurrency at ITiCSE Madrid</title>
		<link>http://software.intel.com/en-us/blogs/2008/07/18/pushing-concurrency-at-iticse-madrid/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/07/18/pushing-concurrency-at-iticse-madrid/#comments</comments>
		<pubDate>Fri, 18 Jul 2008 21:49:03 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/07/18/pushing-concurrency-at-iticse-madrid/</guid>
		<description><![CDATA[ITiCSE, the ACM (and others) sponsored conference on "Innovation and Technology in Computer Science Education", took place earlier this month in Madrid; Intel was among the corporate sponsors. The event is, in some sense, a European version of SIGCSE, but on a more intimate scale, omitting, almost entirely, the industry-exhibitor portion (think textbooks) so prominent at the American event. I [...]]]></description>
			<content:encoded><![CDATA[<p>ITiCSE, the ACM (and others) sponsored conference on "Innovation and Technology in Computer Science Education", took place earlier this month in Madrid; Intel was among the corporate sponsors. The event is, in some sense, a European version of SIGCSE, but on a more intimate scale, omitting, almost entirely, the industry-exhibitor portion (think textbooks) so prominent at the American event.</p>
<p>I had the privilege of delivering a talk there, "Confronting Manycore", hammering again on the theme of getting concurrency into undergraduate curricula worldwide. After all, even laptops now have multiple cores, so what's the point of a continued focus on sequential approaches? The hardware now available is not limited to sequential execution, so why limit students' outlook to that outmoded constraint?</p>
<p>One response we hear frequently to this shift is, Ok, so we've got to teach concurrency; which of our essential CS topics do you propose we leave out? In the ITiCSE talk, I made the argument that this is a false choice; it is not required to choose "either sequential or parallel", but rather, to keep teaching those valuable CS topics in the context of concurrency. This got things moving, with audience members responding to one another on the points.</p>
<p>Two particular comments struck me: even after an algorithm is distributed in parallel, code executing on each core is, itself, sequential. Fair enough. Clay Breshears touches on this topic in his own recent blog, <a href="http://software.intel.com/en-us/blogs/2008/07/17/something-serial-this-way-comes/">Something Serial This Way Comes</a>, making the case for retention of serial-optimization skills. Ok, let's concede that sequential topics stay with us, as a subset of the overall CS portfolio.</p>
<p>The other: there are concurrency-specific topics which do not have counterparts, or obvious mappings, to the sequential CS topics. One example cited was thread safety: important to teach, now, but necessarily displacing some traditional topic. Thus, it was asserted, it really is a zero-sum game, and decisions must be made as to what of the historic material gets dumped. Suggestions welcome!</p>
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		<title>DAC, part 1: the NVidia tutorial, an ecumenical approach</title>
		<link>http://software.intel.com/en-us/blogs/2008/06/13/dac-part-1-the-nvidia-tutorial-an-ecumenical-approach/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/06/13/dac-part-1-the-nvidia-tutorial-an-ecumenical-approach/#comments</comments>
		<pubDate>Sat, 14 Jun 2008 00:47:20 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/06/13/dac-part-1-the-nvidia-tutorial-an-ecumenical-approach/</guid>
		<description><![CDATA[This week's Design Automation Conference, in Anaheim, included a full-day tutorial called "Programming Massively Parallel Processors: The NVIDIA Exprience". Since my own talk was not until next day, I went ahead and enrolled. As expected, this covered the CUDA programming model in detail -- handling host-device communication ("device" being the NVidia processor, G80 in this [...]]]></description>
			<content:encoded><![CDATA[<p>This week's Design Automation Conference, in Anaheim, included a full-day tutorial called "Programming Massively Parallel Processors: The NVIDIA Exprience". Since my own talk was not until next day, I went ahead and enrolled.</p>
<p>As expected, this covered the CUDA programming model in detail -- handling host-device communication ("device" being the NVidia processor, G80 in this case), C syntax extensions, memory model, performance considerations, etc. Though the format was lecture-only (i.e., no labs), the day was worthwhile and informative. Two different lecturers tag-teamed most of the day, and a 3rd concluded with a series of case studies. The instructor choices were somewhat surprising...</p>
<p>The NVidia instructor was their chief scientist, David Kirk. I'd seen his name frequently in the context of CUDA university workshops, so was not surprised to see him at DAC. But the company's chief scientist? Wouldn't this be like Intel sending Justin Rattner to deliver, besides the keynote, a workshop on, say, Nehalem performance tuning? So, ok, this is at least a mild surprise. NVidia is taking this evangelism and training thing *very* seriously.</p>
<p>Another lecturer was Wen-mei Hwu, professor from Univ of Illinois. Hwu is a well-regarded figure in parallel computing, so it was fun to finally meet him, hear him speak. Hwu is also, come to think of it, Co-Director of Intel's "Universal Parallel Computing Research Center", UPCRC, at Illinois. Hmm, an Intel-sponsored Director instructing at an NVidia event? Given recent and very public barbs tossed each way from the two companies, this was at least a bit surprising.</p>
<p>The third speaker was Damir Jamsek, from IBM, with case studies on power grid analysis, and small circuit simulation (this was a "design automation" conference, after all). There was some detailed analysis on performance, including the impact of loop unrolling and memory management, as well as a peek at some issues in porting sparse linear solvers to this kind of platform. IBM is also, come to think of it, purveyor of a competing platform called Cell, so here was another surprise.</p>
<p>Ahead of this tutorial, I'd wondered how NVidia staff might react to an Intel student in their class, so in the morning break I introduced myself, pointing to the "Intel" on my conference badge. Kirk was both calm and cordial; no problem at all. Given that two of the three instructors held affiliations with competitors, I suppose there would be no difficulties over provenance of the students!</p>
<p>Though initially surprising, this approach -- sharing of parallel-computing insight among companies -- is profoundly right. All of us will survive to the extent that software developers adapt to the new concurrency universe, and it's in our collective interest that we bring about that adaptation as quickly as possible.</p>
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		<title>Parallel computing: disappearing from CS curricula???</title>
		<link>http://software.intel.com/en-us/blogs/2008/05/02/parallel-computing-disappearing-from-cs-curricula/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/05/02/parallel-computing-disappearing-from-cs-curricula/#comments</comments>
		<pubDate>Fri, 02 May 2008 22:18:23 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/05/02/parallel-computing-disappearing-from-cs-curricula/</guid>
		<description><![CDATA[Now that multicore computing platforms are standard issue (can you even find a single-core system for sale?), a fraction of the academic community is beginning to at least think about adjusting their teaching focus, to align with this reality. Given that context, it was startling to hear a panelist at IPDPS (in Miami, a couple [...]]]></description>
			<content:encoded><![CDATA[<p>Now that multicore computing platforms are standard issue (can you even <em>find</em> a single-core system for sale?), a fraction of the academic community is beginning to at least think about adjusting their teaching focus, to align with this reality.</p>
<p>Given that context, it was startling to hear a panelist at <strong>IPDPS</strong> (in Miami, a couple of weeks ago) assert that parallel-processing topics have been <em>disappearing</em> from CS curricula in recent years. As anecdotal evidence, he pointed out the topic’s removal in the 2<sup>nd</sup> edition of <em>Introduction to</em> <em>Algorithms</em> (the elegant tome otherwise known by its authors’ initials, CLRS).</p>
<p>Could this possibly be true? Before rushing off to blog, I had to check. First, find an old copy of CLRS, oops, CLR in those days. Sure enough, there was a whole chapter called “Algorithms for parallel computers” which had gone missing in the current edition. Hmm, perhaps parallel concepts were infused into the overall approach? After a couple of long evenings getting reacquainted with CLRS, I had to conclude: no, it’s simply disappeared.</p>
<p>But perhaps this example is a weird one-off, a singular anomaly offset by broader trends? After all, schools like UC Berkeley introduce concurrency in the freshman course, and we here at ISC work with many schools on this topic. Further, googling the obvious keywords pops over a million hits, so things would appear to be, reassuringly, busy.</p>
<p>No. The panelist’s observation is accurate. If anything, the situation is worse than described. Here are some unhappy details:</p>
<p>Way back in <strong>1995, IEEE Computer</strong> published an article, <em>Parallel Computing in the Undergraduate Curriculum</em>, by profs at Colgate. As stated in the abstract, “The author describes how parallel computing can be integrated into courses throughout the computer science undergraduate curriculum.”</p>
<p>Good stuff. So, what is Colgate doing now, 13 years later? There is one course on the topic, at the advanced level only, and it is NOT required for the CS major.</p>
<p>Still 1995: the <strong>First Wellesley Forum on Parallel Computing Curricula</strong>. Brown university presents a paper called <em>Integrating Parallelism into the First Theory Course</em></p>
<p>Good stuff. So, what is Brown doing now, 13 years later? They list a single grad course, offered occasionally -- btw NOT this year.</p>
<p>Forward a couple years, to <strong>ITiCSE ’97</strong>. George  Washington University presents a paper, <em>Concurrent programming CAN be introduced into the lower-level undergraduate curriculum. </em>They even refer back to ACM standardization efforts in this area, from 1991.</p>
<p>Good stuff. So what is GW doing now, 11 years later? At last, something: in one required course, called<strong> </strong>Software Paradigms, we read among the topics:<strong> “</strong>concurrent software design paradigms and patterns”. Excellent. I’m going to contact this prof, Michael Feldman, maybe buy him a beer – uh, hold that thought, Feldman is listed as retired…</p>
<p>One more. Forward to the <strong>OOPSLA 1998 Educators’ Symposium</strong>, where Loyola of Chicago is arguing: “that a computer-science curriculum should introduce the principles of concurrent programming in an integrated, coherent, and application-independent fashion early in the major.”</p>
<p>Good stuff. So, what is Loyola doing now, 10 years later? Sigh. One advanced class, NOT required for the CS major. No evidence of concurrency in other courses.</p>
<p>The pattern is monotonously repetitive. Forward-looking academics looked at the parallel computing challenge a decade ago, announced they would champion a solution, and saw their efforts, for the most part, defeated. What happened??</p>
<p>I’m headed to <strong>ITiCSE ’08</strong>, in Madrid this summer, to tilt at this windmill myself. Those of us looking to retire the now-obsolete sequential assumptions, baked into 50 years of CS curricula, do enjoy one serious advantage not available to those courageous predecessors: multicore computing platforms are now the norm. Recognizing that reality, let’s make the adjustment time short.</p>
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		<title>SIGCSE impressions, from a first-timer</title>
		<link>http://software.intel.com/en-us/blogs/2008/03/24/sigcse-impressions-from-a-first-timer/</link>
		<comments>http://software.intel.com/en-us/blogs/2008/03/24/sigcse-impressions-from-a-first-timer/#comments</comments>
		<pubDate>Mon, 24 Mar 2008 23:11:41 +0000</pubDate>
		<dc:creator>Michael Wrinn (Intel)</dc:creator>
				<category><![CDATA[Academic]]></category>
		<category><![CDATA[Parallel Programming]]></category>

		<guid isPermaLink="false">http://software.intel.com/en-us/blogs/2008/03/24/sigcse-impressions-from-a-first-timer/</guid>
		<description><![CDATA[I had the pleasure this month of attending my first SIGCSE conference, conveniently located in Portland, within walking distance of home. Now that a week's gone by, a couple of impressions stand out: 1. The tone, compared to a typical academic conference, was remarkably congenial. Technical conferences, in my experience, tend to be combative (everyone's [...]]]></description>
			<content:encoded><![CDATA[<p>I had the pleasure this month of attending my first SIGCSE conference, conveniently located in Portland, within walking distance of home. Now that a week's gone by, a couple of impressions stand out:</p>
<p>1. The tone, compared to a typical academic conference, was remarkably congenial. Technical conferences, in my experience, tend to be combative (everyone's chasing the same grant money, after all), a modern-day descendant of medieval jousts: bring a sharp lance (make clever points in your own talk), and look for advantage (challenge the other speakers at theirs). In contrast, SIGCSE attendees were relaxed, cordial, and constructive -- demeanors all refreshing, even startling.</p>
<p>2. Manycore/concurrency concerns may be on the curriculum radar, but only as a distant speck. You could count the number of concurrency talks or workshops on a single hand, and I observed an alarming lack of urgency to adapt to the retirement of single-core architectures. One speaker talked of changing things when 32-core chips showed up "in about ten years". Sorry, some of these are already here (GPGPU); <em>many</em> more will enter the mainstream before current students graduate.</p>
<p>To this second point, it was gratifying to see the crowded attendance at the manycore talk, where I worked on raising the anxiety level (manycore programming is here, be very afraid). This shift, serial to multicore to manycore, is going to be an interesting if bumpy ride for all, and we'll want to keep sharing information in that congenial and open spirit of SIGCSE.</p>
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