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Posts in the "Software Tools" Category 
Doctor Fortran in "I Can C Clearly Now, Part I"
By Steve Lionel (Intel) (25 posts) on May 11, 2012 at 12:38 pm
Comments (0)
Spend any time in the comp.lang.fortran newsgroup, or other places where programming languages are discussed, and you’ll soon see a new “Which is better, Fortran or C?” thread show up. These never fail to produce heated comments from people who should know better. My answer is that neither is “better” – each has its strengths [...]
Category: Parallel Programming, Software Tools
Tags: C interoperability, Fortran
Deterministic Reduction: a new Community Preview Feature in Intel® Threading Building Blocks
By Alexei Katranov (Intel) (1 posts) on May 11, 2012 at 2:22 am
Comments (1)
Computer Arithmetic has a lot of peculiarities [1]. One of these pitfalls is associativity failure in floating point arithmetic. For example, the two sums of fractions calculations below will not produce the same result when using floats: In a sequential program, it is not a big problem since the calculation order is exactly specified so [...]
Category: Open Source, Parallel Programming, Server, Software Tools
Tags: Computer Arithmetic, deterministic calculations, floating point, Open Source, parallel programming, parallelism, parallel_deterministic_reduce, parallel_reduce, TBB, Threading Building Blocks
Digital Logic Simulation with the Intel® TBB Flow Graph, Part 3: Putting together a simulation
By Terry Wilmarth (Intel) (10 posts) on May 5, 2012 at 9:00 am
Comments (0)
In Part 2 of this blog, I described a four-bit adder circuit built from components discussed in Part 1. In this last installment, I’ll continue using Intel®TBB’s flow graph to put together some signal input and output devices, and then use those to make a small simulation featuring the four-bit adder from Part 2. Let’s [...]
Category: Open Source, Parallel Programming, Software Tools
Tags: flow graph, Intel TBB, TBB, Threading Building Blocks
Digital Logic Simulation with the Intel® TBB Flow Graph, Part 2: Building bigger components
By Terry Wilmarth (Intel) (10 posts) on May 4, 2012 at 9:00 am
Comments (0)
In Part 1, I described how to put together a basic logic gate using the Intel® Threading Building Blocks flow graph nodes or_node and multifunction_node. In this blog, I will assume the basic logic gates and_gate, or_gate and xor_gate exist, and use them to construct a four-bit adder. To begin with, I’ll first construct a [...]
Category: Open Source, Parallel Programming, Software Tools
Tags: flow graph, Intel TBB, TBB, Threading Building Blocks
Digital Logic Simulation with the Intel® TBB Flow Graph, Part 1: Using the or_node
By Terry Wilmarth (Intel) (10 posts) on May 3, 2012 at 9:00 am
Comments (0)
In this multi-part blog, I’m going to show you how to put together a simple logic simulation program using the Intel® Threading Building Blocks flow graph feature. Please note that this example does NOT demonstrate a practical approach to digital logic simulation. The purpose of the example is to demonstrate the use of several types [...]
Category: Open Source, Parallel Programming, Software Tools
Tags: flow graph, Intel TBB, or_node, TBB, Threading Building Blocks
Aggregator: a new Community Preview Feature in Intel® Threading Building Blocks
By Terry Wilmarth (Intel) (10 posts) on May 2, 2012 at 9:00 am
Comments (0)
Intel® Threading Building Blocks (Intel® TBB) 4.0 Update 4 introduces a new Community Preview feature, the aggregator. An internal version of the aggregator has been in use in Intel® TBB for some time, appearing in the flow graph and concurrent priority queue implementations. An aggregator is like a mutex in that it enforces mutually exclusive [...]
Category: Open Source, Parallel Programming, Software Tools
Tags: Community preview feature, Concurrency control, Intel TBB, TBB, Threading Building Blocks
TACC symposium and programming two SMP-on-a-chip devices
By James Reinders (Intel) (48 posts) on April 26, 2012 at 8:28 pm
Comments (0)
one presenter exclaimed “Time spent optimizing for MIC is time well spent because it optimizes your code for non-MIC processors at the same time.”
Category: Parallel Programming, Performance and Optimization, Software Tools
Tags: Cilk Plus, Intel MIC, Knights Corner, Knights Ferry, many-core, multi-core, parallel programming, parallelism, SCC
Intel Announces the New Intel® SDK for OpenCL* Applications 2012
By Arnon Peleg (Intel) (5 posts) on April 25, 2012 at 3:38 am
Comments (6)
In support of the recent announcement of the 3rd Generation Intel® Core™ Processors, Intel has released the Intel® SDK for OpenCL* Applications 2012. For the first time, OpenCL* developers using Intel® architecture can utilize compute resources across both Intel® Processors and Intel® HD Graphics Driver 4000/2500
Category: Academic, Game Development, Graphics & Media, Parallel Programming, Performance and Optimization, Server, Software Tools
Tags: "Intel OpenCL SDK", "Intel OpenCL", openCL, vcsource_product_oclsdk, vcsource_type_event, vcsource_type_news
Video: Host-Based Provisioning Intel vPro clients using the ACU Wizard
By Gael Holmes Hofemeier (Intel) (132 posts) on March 29, 2012 at 2:12 pm
Comments (2)
There are two utilities that are packaged with the Intel SCS (Setup and Configuration Software) that are very simple to use and can help you enable Intel AMT quickly. Starting with Intel AMT 6.2, we have what is called "Host-based Provisioning." This means you can now configure and enable Intel AMT directly on the system [...]
Category: Manageability & Security, Software Tools
Tags: ACU Wizard, AMT, SCS, vpro
Video: Discovering your Intel® vPro Capabilities using the Intel® SCS Discovery Tool
By Gael Holmes Hofemeier (Intel) (132 posts) on March 28, 2012 at 2:24 pm
Comments (1)
I have already blogged quite a bit on this tool, but since it is pretty popular I thought I'd turn it into a video as well. Running the SCS Discovery tool is often my first suggestion to our developers who are having questions about why something about Intel AMT is not working for them. In [...]
Category: Manageability & Security, Software Tools
Tags: Intel AMT, Intel SCS, SCS Discovery, vpro
Dualbooting Windows 7 and Windows 8
By Rami Radi (Intel) (1 posts) on March 20, 2012 at 2:08 pm
Comments (5)
The Windows 8 Consumer Preview ISO image became public a few days ago, which is available here, so I am sure a lot of people are interested in trying it out on their development systems without replacing their current Windows 7 installation. If you've ever dual booted a system before, the procedure for doing it [...]
Category: Academic, Intel SW Partner Program, Parallel Programming, Performance and Optimization, Power Efficiency, Site News & Announcements, Software Tools, Uncategorized
Tags: dual boot, dual booting, dualboot, Windows 8, Windows 8 Consumer Preview
Video: Taking a look at the IMSS software on an Intel® vPro™ technology client (Intel® AMT)
By Gael Holmes Hofemeier (Intel) (132 posts) on March 2, 2012 at 9:27 am
Comments (0)
If you have either a Notebook or a Desktop equipped with Intel(R) vPro Technology and you are also working with one of it's components, Intel(R) Active Management Technology, chances are you have the "Intel Management and Security Status" software installed on your system. In this video, we start this software and take a closer look [...]
Category: Intel SW Partner Program, Manageability & Security, Software Tools
Introducing Cloud IdaaS - Intel Cloud SSO
By George Jobi (Intel) (8 posts) on February 27, 2012 at 4:20 pm
Comments (0)
Today we are introducing Intel’s first enterprise focused SaaS offering that brings the best of Intel cloud offering ECA 360 and McAfee Cloud Security Suite product into a multi-tenant offering. The same core functionality that our on-prem product ECA 360 has Single-Sign-On (SSO) for cloud application, User Provisioning and Strong Auth is now supported in [...]
Category: Intel SW Partner Program, Manageability & Security, Software Tools
Tags: cloud, IdaaS, identity, IPT, SaaS, security, Ultrabooks
Intel Tool Helps SW Developers Develop More Secure Applications
By Robert Chesebrough (Intel) (14 posts) on February 7, 2012 at 3:27 pm
Comments (2)
Developers are urged to find these kinds of bugs using tools such as Intel Static Security Analysis, and then make it a practice to validate all inputs and replace unsafe functions (strcpy, strncpy, strcat, and gets, among others) with safe counterparts. To learn more about steps you can take as a developer to reduce your exposure to security attacks go to the Department of Homeland Security's Build Security In website or visit the Common Weakness Evaluation site.
Category: Manageability & Security, Software Tools
Tags: Buffer Overflow, Buffer Overrun, Build Security In, C++, Common Weakness Evaluation, Intel Compiler, Intel® vPro™, Mitigate Secure Bugs, OS Command Injection, owasp top 10, scanf, security, security layer, sprintf, static security analysis, Ultrabook
Coarse-grained locks and Transactional Synchronization explained
By James Reinders (Intel) (48 posts) on February 7, 2012 at 2:55 pm
Comments (5)
Coarse-grained locks, and the importance of transactions, are key concepts that motivate why Intel Transactional Synchronization Extensions (TSX) is useful. I’ll do my best to explain them in this blog. In my blog “Transactional Synchronization in Haswell,” I describe new instructions (Intel TSX) that will improve the performance of coarse-grained locks. Understanding coarse-grained locks and [...]