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Intel® AVX and CPU Instructions
Intel® Developer Zone:
Intel® AVX and CPU Instructions
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Support for Intel® AVX, which provide the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC).
Intel® AVX and CPU Instructions
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The Intel® Software team in the United Kingdom and Germany are organizing an exclusive opportunity for software developers. We will be inviting the...
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by Hannes Hofmann Mon, 05/16/2011 - 08:42 |
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Timing of LPT-port by ugtehservis » Wed, 09/03/2008 - 23:36 |
Wed, 09/03/2008 - 23:36 |
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by Igor Levicki Tue, 09/30/2008 - 17:35 |
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Forums will be read-only 09/24 10PM PST to 09/25 12PM PST by Intel Software ... » Mon, 09/22/2008 - 11:46 |
Mon, 09/22/2008 - 11:46 |
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by Intel Software ... Mon, 09/22/2008 - 11:46 |
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FMA now an extension of AVX? by gabest » Wed, 08/27/2008 - 23:58 |
Wed, 08/27/2008 - 23:58 |
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by Thai Le (Intel) Mon, 09/08/2008 - 09:32 |
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Quad precision ? by tux456 » Thu, 08/28/2008 - 08:10 |
Thu, 08/28/2008 - 08:10 |
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by tux456 Thu, 08/28/2008 - 12:54 |
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How many MMX/SSE units in Core-2 Quad by murzik » Mon, 08/25/2008 - 09:03 |
Mon, 08/25/2008 - 09:03 |
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by Igor Levicki Mon, 08/25/2008 - 09:03 |
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About INstruction Decoder in P4 by biplabraut » Wed, 08/13/2008 - 00:11 |
Wed, 08/13/2008 - 00:11 |
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by Thai Le (Intel) Wed, 08/13/2008 - 00:11 |
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Intel's IA32/64 bit architecture's instruction set encoding by postaquestion » Thu, 04/24/2008 - 16:45 |
Thu, 04/24/2008 - 16:45 |
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by Agner Wed, 08/06/2008 - 02:50 |
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Additional instructions suggestion by c0d1f1ed » Mon, 04/28/2008 - 14:43 |
Mon, 04/28/2008 - 14:43 |
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by Agner Wed, 08/06/2008 - 02:37 |
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P4 stalls for >240 uSec by stevek999 » Fri, 07/11/2008 - 06:28 |
Fri, 07/11/2008 - 06:28 |
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by Igor Levicki Tue, 08/05/2008 - 05:18 |
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SSE 4.2 on which processors? by md_intel » Thu, 07/31/2008 - 23:08 |
Thu, 07/31/2008 - 23:08 |
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by Thai Le (Intel) Thu, 07/31/2008 - 23:08 |
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Consecutive load operations results problem by biplabraut » Tue, 07/29/2008 - 23:34 |
Tue, 07/29/2008 - 23:34 |
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by biplabraut Tue, 07/29/2008 - 23:34 |
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adding or comapring 8 bit unsigned data in XMM register by biplabraut » Mon, 07/28/2008 - 23:17 |
Mon, 07/28/2008 - 23:17 |
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by biplabraut Mon, 07/28/2008 - 23:17 |
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Extracting XMM register elements gives compilation error by biplabraut » Mon, 07/28/2008 - 00:31 |
Mon, 07/28/2008 - 00:31 |
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by Igor Levicki Mon, 07/28/2008 - 00:31 |
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Compute eflags by hunter123 » Tue, 06/17/2008 - 14:00 |
Tue, 06/17/2008 - 14:00 |
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by Igor Levicki Sun, 07/27/2008 - 20:36 |
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SSE2 - Class crash with SSE related members by obscurity » Thu, 06/05/2008 - 04:54 |
Thu, 06/05/2008 - 04:54 |
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by Igor Levicki Sun, 07/27/2008 - 19:54 |
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How is the brandstring formed by BIOSes? by pgzh » Fri, 07/25/2008 - 15:25 |
Fri, 07/25/2008 - 15:25 |
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by Igor Levicki Fri, 07/25/2008 - 15:25 |
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Detailed info about FTZ & DAZ by gol » Thu, 07/03/2008 - 01:36 |
Thu, 07/03/2008 - 01:36 |
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by gol Wed, 07/23/2008 - 05:41 |
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strlen with SSE4.2 instructions by wmula » Sat, 06/07/2008 - 15:10 |
Sat, 06/07/2008 - 15:10 |
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by Shih Kuo (Intel) Mon, 07/21/2008 - 22:47 |
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Microinstruction Format by dargueta » Sat, 07/12/2008 - 22:41 |
Sat, 07/12/2008 - 22:41 |
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by dargueta Tue, 07/15/2008 - 19:50 |
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AVX VBROADCAST instructions. Why is register operand not allowed? by Agner » Mon, 07/14/2008 - 02:52 |
Mon, 07/14/2008 - 02:52 |
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by Shih Kuo (Intel) Mon, 07/14/2008 - 02:52 |
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