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Intel® Many Integrated Core Architecture (Intel MIC Architecture)

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Intel® Xeon Phi™

Intel® Xeon Phi™ is the new brand name for all future Intel® Many Integrated Core Architecture (Intel MIC Architecture) based products. Available by the end of 2012, the first generation of Intel Xeon Phi product family (coprocessors codenamed "Knights Corner") will complement the existing Intel Xeon processor E5-2600/4600 product families and deliver new levels of performance for highly parallel workloads.

This forum is for discussion of public information about Intel MIC Architecture, Xeon Phi, and preparing code to fully utilize this class of machines whether on a single chip or not (this is the key to programming the coprocessor). Please refer to the FAQ for guidelines on what questions will not be answered at this time, such as introduction date, pricing and SKU information.

Please refer to the RESOURCES to point to documents which are available publicly to answer many questions. Questions will be answered by both peers and Intel representatives that monitor this forum. Software developers who have access to preproduction Knights Corner machines are welcome to this forum for discussion of public information.

 
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Topic / Topic startersort descending Post date Replies Last post
Normal topic How to use MIC Intrinsics?
by Harnz » Wed, 11/14/2012 - 03:23 		Wed, 11/14/2012 - 03:23 5
 by Kevin Davis (Intel)
Tue, 12/04/2012 - 04:54
Normal topic How to use swizzling ?
by Erik Saule » Thu, 11/15/2012 - 09:19 		Thu, 11/15/2012 - 09:19 3
 by Erik Saule
Wed, 11/21/2012 - 13:28
Normal topic HPL over Xeon Phi compilation error
by francesca.tarta... » Fri, 03/29/2013 - 02:13 		Fri, 03/29/2013 - 02:13 2
 by francesca.tarta...
Tue, 04/02/2013 - 01:35
Normal topic I/O performance and best way to run Native executable
by luckynew » Thu, 03/28/2013 - 09:31 		Thu, 03/28/2013 - 09:31 6
 by luckynew
Tue, 04/02/2013 - 10:57
Normal topic icpc generates vector instructions for normal C++ and causes crashes
by Teodor P. » Wed, 05/15/2013 - 11:12 		Wed, 05/15/2013 - 11:12 0
 by Teodor P.
Wed, 05/15/2013 - 12:42
Normal topic Improving MPI performance between 2 Xeon Phi cards
by luckynew » Mon, 02/11/2013 - 05:35 		Mon, 02/11/2013 - 05:35 13
 by loc-nguyen (Intel)
Tue, 03/26/2013 - 10:11
Normal topic Instruction format question
by Agner » Sat, 08/04/2012 - 00:51 		Sat, 08/04/2012 - 00:51 6
 by Agner
Wed, 08/22/2012 - 07:46
Normal topic Intel MPI using RDMA does not work on Xeon Phi
by Taras Shapovalov » Tue, 03/19/2013 - 08:47 		Tue, 03/19/2013 - 08:47 2
 by Taras Shapovalov
Tue, 03/19/2013 - 09:41
Normal topic Intel Releases SDK with OpenCL* 1.2 support for Intel® Xeon Phi™ Coprocessors
by Arnon Peleg (Intel) » Thu, 05/09/2013 - 15:14 		Thu, 05/09/2013 - 15:14 0
 by Arnon Peleg (Intel)
Thu, 05/09/2013 - 15:14
Normal topic Intel SDK for OpenCL Applications XE 2013 Beta with support for Intel® Xeon Phi™ coprocessor now available
by BELINDA L. (Intel) » Thu, 01/03/2013 - 09:41 		Thu, 01/03/2013 - 09:41 0
 by BELINDA L. (Intel)
Mon, 02/25/2013 - 08:27
Normal topic INTEL Xeon Phi Linux Debian 6 or Ubuntu 12.04 support
by Michal Kvasnicka » Tue, 02/12/2013 - 02:54 		Tue, 02/12/2013 - 02:54 5
 by Jaiber J.
Wed, 04/03/2013 - 10:38
Normal topic Interleaving values of 2 vector registers
by georgv » Thu, 03/07/2013 - 08:48 		Thu, 03/07/2013 - 08:48 3
 by georgv
Wed, 03/13/2013 - 06:49
Normal topic Intro to High Performance App Development for Intel® Xeon® & Xeon® Phi™ Coprocessor 2-Day Webinar April 23,24
by kathy-farrel (Intel) » Mon, 04/01/2013 - 16:08 		Mon, 04/01/2013 - 16:08 0
 by kathy-farrel (Intel)
Mon, 04/01/2013 - 16:08
Normal topic Is it possible for the CPU core that offloaded the computation to MIC to work concurrently with MIC ?
by Jesmin Jahan T. » Wed, 04/17/2013 - 13:50 		Wed, 04/17/2013 - 13:50 7
 by PONRAM
Sat, 04/27/2013 - 01:19
Normal topic Is it possible to use SIMD instructions in offload mode?
by Liu N. » Wed, 03/27/2013 - 00:26 		Wed, 03/27/2013 - 00:26 1
 by Kevin Davis (Intel)
Wed, 03/27/2013 - 01:37
Normal topic Is it possible to use SIMD instructions in offload mode?
by Liu N. » Wed, 03/27/2013 - 00:26 		Wed, 03/27/2013 - 00:26 4
 by Kevin Davis (Intel)
Fri, 03/29/2013 - 07:54
Normal topic Is there any benchmark for matrix multiplication on MIC?
by Jesmin Jahan T. » Thu, 04/25/2013 - 18:25 		Thu, 04/25/2013 - 18:25 5
 by Jesmin Jahan T.
Fri, 04/26/2013 - 12:02
Normal topic Issue with explicit offload of OpenMP reduction construct in C/C++ programs
by Martyn Corden (... » Wed, 01/16/2013 - 13:16 		Wed, 01/16/2013 - 13:16 0
 by Martyn Corden (...
Tue, 04/16/2013 - 11:51
Normal topic Issues linking with sequential MKL on native MIC code.
by Bharath R. » Fri, 04/19/2013 - 07:24 		Fri, 04/19/2013 - 07:24 7
 by TimP (Intel)
Sat, 04/27/2013 - 06:52
Normal topic Issues using Xeon Phi 5110P
by Justin Bennett » Fri, 02/08/2013 - 09:09 		Fri, 02/08/2013 - 09:09 5
 by siyao z.
Fri, 04/12/2013 - 03:57
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For more complete information about compiler optimizations, see our Optimization Notice.