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Software Tuning, Performance Optimization & Platform Monitoring
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Software Tuning, Performance Optimization & Platform Monitoring
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Discussion around topics such as monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, software characterization, software optimization techniques for performance and power/energy, monitoring CPU core and graphics processors and other system coprocessors as well asimmerging runtime usages for software metering and quality of service.
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Multicore prcessor uses through dot net programming by Kundan Kumar » Sat, 03/03/2012 - 05:55 |
Sat, 03/03/2012 - 05:55 |
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by OKohl Sat, 03/03/2012 - 05:59 |
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Buying a platform for Power and Thermal Management by aajizattari » Thu, 03/01/2012 - 05:48 |
Thu, 03/01/2012 - 05:48 |
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by Patrick Fay (Intel) Thu, 03/01/2012 - 08:09 |
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Why is my application not able to reach core i7 920 peak FP performance by Dan Leakin » Wed, 02/29/2012 - 06:35 |
Wed, 02/29/2012 - 06:35 |
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by Patrick Fay (Intel) Wed, 02/29/2012 - 06:35 |
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Intel PCM - What does nominal CPU mean of? by GHui » Mon, 02/06/2012 - 23:57 |
Mon, 02/06/2012 - 23:57 |
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by bobjc Thu, 02/16/2012 - 03:35 |
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Intel IOMeter problem - why Windows multi-threading data fetching is much much faster than IOMeter? by zhaonaiy » Thu, 02/09/2012 - 22:59 |
Thu, 02/09/2012 - 22:59 |
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by Sergey Kostrov Wed, 02/15/2012 - 07:49 |
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Single stepping on branches, exception or interrupts. by stott1 » Fri, 02/10/2012 - 23:56 |
Fri, 02/10/2012 - 23:56 |
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by stott1 Fri, 02/10/2012 - 23:56 |
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Performance of Compiler Location on Cluster by larry.riche » Thu, 02/09/2012 - 22:18 |
Thu, 02/09/2012 - 22:18 |
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by TimP (Intel) Thu, 02/09/2012 - 22:18 |
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How to interpret the results of getCyclesLostDueL3CacheMisses and getCyclesLostDueL2CacheMisses by cagribal » Thu, 02/09/2012 - 09:39 |
Thu, 02/09/2012 - 09:39 |
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by Roman Dementiev... Thu, 02/09/2012 - 11:16 |
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Need help with specific CFLAGS and CXXFLAGS for my processor and optimizing.... by barnac1e » Sat, 02/04/2012 - 18:53 |
Sat, 02/04/2012 - 18:53 |
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by Patrick Fay (Intel) Thu, 02/09/2012 - 05:47 |
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Intel PCM - Memory controller doesn't support SNB? by GHui » Thu, 02/09/2012 - 00:15 |
Thu, 02/09/2012 - 00:15 |
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by Patrick Fay (Intel) Thu, 02/09/2012 - 00:15 |
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Intel PCM - 1 or l, is it wrong? by GHui » Wed, 02/08/2012 - 23:09 |
Wed, 02/08/2012 - 23:09 |
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by Roman Dementiev... Thu, 02/09/2012 - 00:06 |
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Intel PCM: discrepancy between PCM and PAPI by V S » Wed, 01/04/2012 - 14:02 |
Wed, 01/04/2012 - 14:02 |
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by Roman Dementiev... Wed, 02/08/2012 - 01:54 |
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Intel PCM - Does PCM support X5570 memory controller? by GHui » Mon, 02/06/2012 - 23:41 |
Mon, 02/06/2012 - 23:41 |
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by Roman Dementiev... Mon, 02/06/2012 - 23:41 |
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Intel PCM: L3 Cache Misses Discrepancy(?) by tim.kiefer » Thu, 01/12/2012 - 07:30 |
Thu, 01/12/2012 - 07:30 |
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by GHui Mon, 02/06/2012 - 07:48 |
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i3-2120 FSB Speed and Memory bandwidth by k_sarnath » Sun, 01/29/2012 - 02:21 |
Sun, 01/29/2012 - 02:21 |
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by Shannon Cepeda ... Fri, 02/03/2012 - 11:16 |
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Comparing compilers by magicfoot » Wed, 01/18/2012 - 05:05 |
Wed, 01/18/2012 - 05:05 |
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by TimP (Intel) Fri, 02/03/2012 - 07:35 |
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[Intel PCM] SNB-Server support ? by GHui » Thu, 02/02/2012 - 18:28 |
Thu, 02/02/2012 - 18:28 |
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by GHui Thu, 02/02/2012 - 18:28 |
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Weird CPU usage between x5560 and x5660 systems by sridhar.basam » Wed, 02/01/2012 - 11:42 |
Wed, 02/01/2012 - 11:42 |
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by Patrick Fay (Intel) Wed, 02/01/2012 - 11:44 |
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How to apply 'developer system programming manual' on SNB by GHui » Wed, 02/01/2012 - 00:01 |
Wed, 02/01/2012 - 00:01 |
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by Patrick Fay (Intel) Wed, 02/01/2012 - 00:01 |
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[PCM] L2/L3 Cache Miss Values Are Alway Zero on Sandy Bridge by mikeb01 » Fri, 01/27/2012 - 00:36 |
Fri, 01/27/2012 - 00:36 |
3 |
by Roman Dementiev... Fri, 01/27/2012 - 01:26 |
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