Intel Software Network - <![CDATA[ Threading on Intel® Parallel Architectures ]]> feed http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures en-us HTMulticore library
 On my quest for locating info on how to get CPU information on Windows, I found the HTMulticore library on http://software.intel.com/en-us/articles/hyper-threading-technology-multi-core-and-mobile-intel-pentium-processor-m-toolbox/
The problem is, that I'm unable to use the linker library in my own code, since it aparently wants to use LIBC.lib as well - and this library doesn't exist with Visual Studio 2008.

Doesn anyone have an idea to solve this - or is it possible to have the author recompile the library code, so it can be used with Visual Studio 2008 ?

Regards,
bipsen
]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/70049/ Fri, 20 Nov 2009 12:17:53 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/70049/ Parallel Programming Intel Thread Checker installation on ubuntu I have followed all the instructions on the installation guide and the installation seemed to end normally.
When i take a .gcc file and run the command     > tcheck_cl ./primes.gcc  nothing seems to happen.It just creates a txt file with what would be the programs output, instead of running actually the results.
I have no idea of what goes wrong .Can anybody save me?
Thanks a lot. ]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/70019/ Thu, 19 Nov 2009 14:18:57 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/70019/ Parallel Programming Does Dotnet Applications run on Mac Os http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69994/ Thu, 19 Nov 2009 03:07:42 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69994/ Parallel Programming Unable to find Intel Concurrency Checker Are you still going to offer new versions or is it considered replaced by your other utilities? ]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69903/ Sun, 15 Nov 2009 19:22:36 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69903/ Parallel Programming LoadLibrary fails on libiomp5md.dll (v 11, win32), is there a workaround? The C++ code is an \MD dll that statically links with IPP 6 library. The C++ dll is wrapped into the managed C++ wrapper dll (\CLR, \MD) which is referenced by a C# assembly. Everything works perfectly without OpenMP.
I parallelized the C++ dll with OpenMP and it works with C++ test executable.
However, when called from C# code, the whole thing crashes when the LoadLibrary is called by the framework on  libiomp5md.dll. The error message is "Access violation reading location 0x00000000".
Could somebody help me? Is there a workaround around the LoadLibrary failure? I would appreciate any advice I can get.

I wrote some test code, and the LoadLibrary indeed fails on libiomp5md.dll, even without C#. I can not use any solution that requires \MT switch, since \CLR is not compatible with \MT. I did place the libiomp5md.dll into the directory of my C# executable. I do have appropriate Intel directories added to my path. My own dlls are safely loaded by the framework before the loading of the Intel dll fails. I checked with dependency walker, and I do not seem to miss any of the dependencies.
  ]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69888/ Fri, 13 Nov 2009 16:53:52 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69888/ Parallel Programming Free webcast Dec. 3: Intel® Concurrent Collections: Parallelization of C++ Programs Illustrated with Examples Intel® Concurrent Collections: Parallelization of C++ Programs Illustrated with Examples
Thursday, Dec. 3, 11 a.m. PST
This session tackles the use of Intel® Concurrent Collections for C++ with practical examples. Learn to parallelize your applications to take advantage of multi-core, without worrying about low-level threading constructs or thread scheduling.

Presenters: Kath Knobe, research scientist; and Ganesh Rao, technical consulting engineer, Intel Compiler Lab.**

To register and review full curriculum description:

Step 1: Create an account with Intel® Learning Network
Step 2: Click session link. From the Session table, select Register under the Actions column. An automated e-mail response will be sent to you with a calendar reminder.

For more webcast session topics, see HERE. ]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69887/ Fri, 13 Nov 2009 16:17:54 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69887/ Parallel Programming Intel Software Tools that support Ruby on Rails
I have a requirement to develop web based application for Research & Labs that remotely connet to server and this app which will be used by Sceintist and R&D Depts.

My client wants this app to be developed on Ruby on Rails and I petty new to these environment and request for help with best information.

I am excited to use Intel tools like VTune or Compliers but don't know which all tools will support Ruby on Rails.

Request Intel Team and Industry experts to suggest me all the Intel Software Tools that support Ruby on Rails.

Thanks,
Khan. ]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69880/ Fri, 13 Nov 2009 10:56:52 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69880/ Parallel Programming Profiling tools... (slightly off-topic)
This post has 2 parts to it.

I am also going to do some objective comparisons with CUDA. Please dont get touchy. Urge you too look @ it an objective way. Many Thanks!


PART - 1
----------
I just started to work on developing tuned intel code. I figure that there are performance counters to look @ L1 cache miss, hits, core stalls, pretty much everything about instruction life-cycle.. But they all require OS level privilege (wrmsr) to do it. I need a driver to get this basic profiling.

However, I find that all of Intel tools are commercial... Hmm.. So sad! All I need is a small driver through which I could tune my assembly code. I dont need big fat GUIs telling me what to do. Basically, I dont require an "Idiot series" software. I need a software that will just get me counter values. I can figure out the rest.

I urge Intel software division to release atleast a basic tool for profiling code for developers.. Come on, I have bought your hardware... Dont I deserve at least a simple tool for free??

How many intel developers really use advanced techniques like cache-blocking, register blocking, DTLB blocking, Keeping functional units occupied etc. to get performance from the code? I doubt if that would be many. The only thing Intel would say at this point is "Use our compilers; Use our software; Use Intel MKL". But yeah, times are changing. You may need to re-think your strategy.

There is a reason why people get highly excited by speedups provided by technologies like CUDA. That is because they dont know how good intel CPU could be. I think the main reason is that Intel did NOT spread awareness about their superscalar processor as much as they are about multi-core CPUs.

I think it is time Intel release
1. Set of coding guidelines that demonstrate nice techniques to developers
2. Provide a basic profiling tool FREE of cost to developers to understand Intel cores better.

Note that CUDA programming model automatically takes care of "Register and Cache blocking" -- which is a major reason for effortless performance.

PART-2
---------
I attended an Intel conference yesterday in Bangalore. I understand that the micro-architecture keeps changing all the time..(Every few years) -- meaning my optimized hand-written assembly code will NOT guaranteedly work optimized on newer versions... Thats a great cause of concern. Even MKL stores one version of code for each micro-architecture...

Thats just a pain.

Let us look @ CUDA in an objective way. CUDA code is compiled to an intermdiate binary (PTX virtual architecture) which is closer to the native architecture. At run-time, depending on the architecture, this code is translated. So, I dont have to worry about anything. Intel should probably look @ this to help developers.

Thanks,
Best Regards,
Sarnath ]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69868/ Fri, 13 Nov 2009 00:07:53 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/69868/ Parallel Programming Bay Area Developers - Attend Intel&#39;s new Parallelism Training Class FREE! Learn more
]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/66394/ Thu, 12 Nov 2009 15:06:28 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/66394/ Parallel Programming Eventcounts I've posted an example implementation of eventcount and several usage examples on TBB forum:

http://software.intel.com/en-us/forums/intel-threading-building-blocks/topic/62364

Eventcount is a kind of "condition variable for lock-free algorithms", it can be used for blocking/signaling of threads with basically any lock-free/wait-free data structure (like producer-consumer queue) doesn't destroying it's lock-free properties and performance.

 

]]> http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/62367/ Thu, 12 Nov 2009 15:05:38 -0800 http://software.intel.com/en-us/forums/threading-on-intel-parallel-architectures/topic/62367/ Parallel Programming