Hi Muthu.

a) I can only provide you with a fairly general answer to this question about memory layout, since it may vary considerably from system to system. On an Intel Atom Processor based intelligent system, frequntly the memory layout when using a full featured OS like Linux* is essentialy identical to what you would fine on a standard PC. This is however only true if your system has a similar system setup with BIOS, HDD and the OS being loaded into execution RAM from the HDD.

b) This gets us to your second question. If we assume that your embedded device is a low power small form factor device with a custom OS. Let's say Android* or VxWorks for example. The device will commonly have a boot NOR, which contains the firmware. In the case of phones, there may however be shadowed memory over the boot NOR that makes it unreadable unless a specific instruction sequence and passcode is provided to make the NOR readable and have execution of the firmware proceed. This is called secure boot.

The firmware will then read the OS image from NAND flash, copy it into execution RAM and from then on the OS behaves the same as usual again.

This is of course only one specific scenario. Depending on your exact targetplatform and OS this could vary.

The key property of embedded development is that the device in question has a clear purpose and that all design questions are answered in a specific customized way to this purpose.

In short the difference between standard PC development and embedded development is not necessarily that memory layour and boot process are different, but rather that in the later case there is no standard answer and the layout may vary from device to device.

As an entry into the topic you may want to have a look at the book linked to here:
http://www.intel.com/intelpress/sum_ms2a.htm

You may also have alook at
http://embedded.intel.com

and roamthrough the resources available there.

Thanks, Rob