I have a question that nobody can answer at this time and I would love to know more about this.
It seems that, whatever the multiplier is, the internal clock speed reported by TSC is always reported at its maximum. (I.E. for a 3.8 GHz Prescott F41 running at 14*200, the TSC still works at 3.8 GHz while the CPU is
working at 2.8 GHz)
As we use TSC to compute internal clock speed, the reported frequency
is always reported at its maximum value, independently of the current multiplier, that causes the fsb to be wrong, of course, when you tryed to compute FSB by : (Freq by TSC)/ Multiplier.
Have you got some more informations about change done on the TSC in this new Prescott Core ? This "issue" does NOT occur with the old Northwood core (We tryed with a Mobile Northwood that allow multiplier change by EIST) but still occur in Prescott F43 (6xx Serie) and on Smithfield CPU...
Samuel DEMEULEMEESTER - UIN : 210384
Chief Editor : http://www.x86-secret.com
Developer : http://www.memtest.org
Message Edited by S_DEMEULEMEESTER on 02-14-2005 11:21 AM