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Intel® Xeon® processors provide:

  • Up to 32 cores per system, allowing you to increase performance by threading your code and using pre-threaded libraries
  • Intel® AVX, delivering up to 2X performance in floating point-intensive applications such as financial, scientific, and media
  • Intel® AES-NI instruction-set calls to accelerate data encryption in media, security, and data center applications
  • Intel® Node Manager and Intel® Data Center Manager that let you implement your app so IT managers can better control power usage

Intel Guide for Developing Multithreaded Applications
Develop efficient multithreaded applications to improve multithreading performance.

Intel® Advanced Encryption Standard Instructions (AES-NI)
Learn about the six new instructions for fast and secure data encryption.

Using AVX Without Writing AVX Code
Options to more easily integrate Intel® AVX into your applications.

Intel® Node Manager Programmer's Reference Kit
Server management technology to monitor and control power and thermal behaviors.

Videos

Deliver top application performance while minimizing development, tuning and testing time and effort.

A Concise Guide to Parallel Programming Tools for Intel® Xeon® Processors
Pick the right programming models and tools to boost your application’s performance.

Download Intel® OpenCL SDK
The first open, royalty-free standard for general-purpose parallel programming.

Parallel Studio XE 2013 is here
Powerful tools to make the most of clusters and supercomputers.

Intel® Compiler Options for Intel® SSE and Intel® AVX
Learn about the three main types of processor-specific optimizations.

Optimize, parallelize, and vectorize your code today.

Planning for Parallel Optimization
Get started with an action plan for big performance improvements.

Testing Parallel Programs
Introduction to the parallel software testing methodologies.

Intel® Hyper-Threading Technology: Your Questions Answered
Learn about this performance feature on Intel® Core™ i7 processors and Xeon® 5500 series processors.

Avoiding AVX-SSE Transition Penalties
How to avoid issues when using Intel® AVX.

Intel® 64 Architecture Processor Topology Enumeration
Algorithm for single-socket to multiple-socket platforms using Intel 64 and IA-32 processors.

Intel® Performance Counter Monitor - A better way to measure CPU utilization
Sample C++ routines and utilities to help gain a significant performance boost.

Intel® Advanced Encryption Standard (AES) Instructions Set - Rev 3.01
Instructions that enable fast and secure data encryption and decryption.

Learn more about platforms that support Data Center, Cloud, and High Performance Computing

High Performance Computing (HPC)
New HPC solutions from Intel deliver intelligent performance to meet today's most complex HPC challenges.

Data Center Design for Cloud Computing
Discover Intel’s vision for the future of cloud computing, as well as the technologies that can make it a reality.

Intel® Xeon® Processors
Intel servers deliver enhanced, energy-efficient performance for data-intensive business applications.

Intel® Cluster Ready
Put more power behind your high-performance computing (HPC) applications.
15-May-2013
11:41 PM PDT
What's new? Update 7 - Intel® VTune™ Amplifier XE 2013
By RAVI (Intel)0
Intel® VTune™ Amplifier XE 2013 Intel® VTune™ Amplifier XE is an easy to use performance and thread profiler for C, C++, C#, Fortran, Java and MPI developers. No special recompiles are needed, . . .
07-May-2013
7:28 PM PDT
Enabling Connectionless DAPL UD in the Intel® MPI Library
By Gergana Slavova...0
What is DAPL UD? Traditional InfiniBand* support involves MPI message transfer over the Reliable Connection (RC) protocol. While RC is long-standing and rich in functionality, it does have certain drawbacks: since it requires that each pair of processes setup a one-to-one connection at the start . . .
06-May-2013
4:25 PM PDT
A case study comparing AoS (Arrays of Structures) and SoA (Structures of Arrays) data layouts for a compute-intensive loop run on Intel® Xeon® processors and Intel® Xeon Phi™ product family coprocessors
By pjbesl (Intel)0
by Paul Besl Download full case study in PDF format Download Download accompanying source code (ZIP format) . . .
06-May-2013
9:44 AM PDT
IDC White Paper: Running Mission-Critical Workloads on Enterprise Linux x86 Servers
By ROBERT M.0
This IDC white paper, sponsored by Intel,  examines the growth of mission-critical workloads being hosted on x86 servers based on the Intel Xeon E7 series of processors running enterprise Linux operating systems. It looks at the way in which x86 servers are taking on more demanding workloads, . . .

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Meshcentral.com - Intel AMT hardware KVM multi-display support
By ylian-saint-hil...Posted May 20th 20130
Every few weeks, I try to add more Intel AMT support in Meshcentral.com. This time around, I added multi-display support for Intel AMT on the hardware KVM viewer. So, when you connect to Intel AMT KVM from ...
Meshcentral.com - New Mesh Graph
By ylian-saint-hil...Posted May 16th 20130
I am glad to annonce a new Mesh graph feature into Meshcentral.com. When you install mesh agents in computers, the agents form a mesh, discovering and monitoring each other. Well, it's not ...
Intel® Xeon Phi™ coprocessor Power Management Part 1: P-States, Reducing power consumption without impacting performance
By Taylor Kidd (Intel)Posted May 15th 20130
Right up front, I am going to tell you that P-states are irrelevant, meaning they will not impact the performance of your HPC application. Nevertheless, they are important to your application in a more roundabout way. Since most of you belong to a group of untrusting and always questioning ...
Speeding Up Your Cloud Environment On Intel® Architecture
By Thai Le (Intel)Posted May 15th 20130
In my previous blog, I discussed “Ways to Speeding up Your Cloud Environment…”, I will continue with this thread by introducing the topic of Software Defined Networks (SDN ...

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Mark Charney (Intel)Fri, January 4th 2013 - 9:25
Intel® Software Development Emulator, Release 5.385
Hello, we just released version 5.38  of the Intel Software Development Emulator. It is available here:http://www.intel.com/software/sde It  includes:  better support for OS X (Snow Leopard and Lion) using code signing. improved support for the ...
Mark Buxton (Intel)Fri, June 10th 2011 - 19:20
Haswell New Instructions posted14
A full specification for the Haswell (2013) new instructions was just posted to the programmer's reference manual at http://software.intel.com/file/36945. A blog will be coming shortly. -Mark Buxton
Thomas Willhalm...Fri, December 31st 2010 - 7:07
Links to instruction documentation23
The Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A and 2B (available here) are the instruction set reference. Haswell (2013) new instructionsare in theprogrammer's ...
mjcFri, May 24th 2013 - 11:42
parallel parallel for overhead in OpenMP3
I have written a function that incurs a tremendous amount of overhead in [OpenMP dispatcher] called by [OpenMP fork] called on behalf of a particular parallel region of mine, according to VTune. That fork accounts for roughly a third of all CPU time in my program. My code is as follows. My ...

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