Intel® C++ STM Compiler, Prototype Edition 3.0 [Knowledgebase]
What If Home | Product Overview | Intel® TM ABI specification | Technical Requirements New! - Draft Spec of Transactional Language Constructs for C++ | FAQ | Primary Technology Contacts | Dis ...
Posted: 2009-08-06 12:38:14 by Robert Geva (Intel), Xinmin Tian (Intel), Ali-reza Adl-tabatabai (Intel)
STM Compiler: Quiescence for read-only transactions [Forums] From the OOPSLA paper:
To implement privatization safety in the presence of optimistic readers, ALL transactions must quiesce [46, 13, 33] on commit.
I'm not sure why ALL transactions must wait ...
Testing abort with tm_pure [Forums] Hi I ma using the Intel STM C compiler version 2.0,
Ihave the following code bellow. when compiled
$icc -Qtm_enable test test.c
the value of "b" is 1 but is expected 0. It works for -O0 specified e ...
STM Compiler: Transactional Contexts 2 [Forums] I've worked out some details wrt "transactional contexts":http://software.intel.com/en-us/forums/whatif-alpha-software/topic/60873/reply/64582/Here is more realistic and detailed proposal.User marks s ...
_tm_release() in STM Compiler/ABI [Forums] I had some conversations with Serge Preis regarding "partial commits" and "partly overlapping transactions" which are intended to increase STM scalability for manipulations on linked-lists, trees, etc ...
