performance
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| Welcome to the Intel C++ Compiler Forum! [Forums] Hello,I welcome you to the Intel C++ compiler discussion forum.You will like this forum if you are a developer interested in C++, parallelism and performance optimization.Cheers!Ganesh ... Posted: 2008-09-26 15:02:32 by Ganesh Rao (Intel) | threads, parallelism, Programming, C++, performance, optimization, compiler |
| Thinking how Intel® VTune™ Performance Analyzer are beneficial on Software Development [Knowledgebase] by Peter Wang I have more than six years development experience on Intel® VTune™ Performance Analyzer, and now as a technical consulting engineer in Intel. I'm very proud of Intel's having this pe ... Posted: 2008-10-13 12:42:13 by | Intel Compiler, Performance Libraries, Microsoft C++, Google Video, Concuurent, performance, Vtune |
| Measure Code Sections Using The Enhanced Timer [Knowledgebase] Introduction Learn how to accurately measure events of short duration using the Enhanced Timer.To measure the performance of an application, it is common to time sections of code where hotspots o ... Posted: 2009-01-13 14:35:54 by Khang Nguyen (Intel), Paul Work (Intel) | performance, Code |
| Writing Code to Reveal the Performance Details of Mobile Processors [Knowledgebase] Introduction Calculations reveal the relationships between power, clock speed, and frequencyby Richard WintertonJames Joule developed the formula for power dissipation (P = I²R), which states that p ... Posted: 2008-10-09 10:13:58 by Richard Winterton (Intel) | performance, Power, Code, Mobility |
| David Mackay, Guru Intel Performance Analysis & Threading Lab: Intel Top Five Take Five Videos [Videos] Meet David Mackay, PhD, Manager of Intel's Performance Analysis & Threading Lab Consulting Group. ... Posted: 2008-05-30 19:54:51 by David Mackay (Intel) | performance, software, intel, threading |
| Analyze Memory Accesses on 64-Bit Intel Architecture [Knowledgebase] Challenge Determine what memory accesses are causing EXE pipeline stalls accumulated by the BE_EXE_Bubble counter. Most memory-access stall cycles are accumulated by the BE_EXE_Bubble counter. Th ... Posted: 2009-03-01 22:13:26 by | itanium, performance, How-To |
| Code Timing and Profiling for Linux on 64-Bit Intel® Architecture [Knowledgebase] Challenge Measure the time a program and its functions take to execute as part of the diagnosis phase of performance optimization. Such measurements are extremely valuable as a simple means to be ... Posted: 2009-03-02 12:44:28 by | itanium, performance, How-To |
| Develop an Execution-Time Benchmark on 64-Bit Intel Architecture [Knowledgebase] Challenge Develop a benchmark to measure the execution time of the piece of code you are optimizing. This is essential to determine whether your code changes are helping or hurting performance. M ... Posted: 2009-03-02 14:48:42 by | itanium, performance, How-To |
| Handle Streaming Data Optimally on 64-Bit Architecture [Knowledgebase] Challenge Handle long, high-bandwidth data streams optimally with the Intel® Itanium® processor. Proper utilization of the lfetch instructions is vital to optimal handling of streaming data. ... Posted: 2009-03-03 15:58:05 by | itanium, performance, How-To |
| Identify Back-End Bubbles on 64-Bit Intel® Architecture [Knowledgebase] Challenge Identify a processor back-end bubble on the Intel® Itanium® processor. A 'bubble' is defined as any delay in the processor. The 'back end' is the place where instructions are retired ... Posted: 2008-11-25 16:16:39 by | itanium, performance, How-To |
| Improve Code Based on Root-Cause Analysis on 64-Bit Intel® Architecture [Knowledgebase] Challenge Improve the efficiency of code based on root-cause analysis of back-end bubbles. That analysis is covered in a separate item How to Perform Back-End Bubble Root-Cause Analysis on 64-Bit ... Posted: 2008-11-25 16:26:53 by | itanium, performance, How-To |
| Improve Performance on 64-Bit Architecture of Applications with Many Small Functions [Knowledgebase] Challenge Improve application performance in programs that contain many frequently used small to medium-sized functions. This characteristic is very common in object-oriented C++ programs that im ... Posted: 2009-03-05 09:14:06 by | itanium, performance, How-To |
| Increase the Frequency of First-Level Instruction-Cache Hits on 64-Bit Intel Architecture [Knowledgebase] Challenge Increase the frequency with which the first-level instruction cache (L1D) is a hit for integer data. This optimization is key to achieving good performance on the Intel® Itanium® proc ... Posted: 2009-03-05 09:29:50 by | itanium, performance, How-To |
| Instruction Latencies in Assembly Code for 64-Bit Intel® Architecture [Knowledgebase] Challenge Optimize assembly-language code for the Itanium® processor family in terms of instruction latencies. The latency of an instruction is the length of time that has elapsed from when the ... Posted: 2009-03-05 09:39:07 by | itanium, performance, How-To |
| Perform Back-End Bubble Root-Cause Analysis on 64-Bit Intel® Architecture [Knowledgebase] Challenge Identify the root cause of a back-end processor bubble on the Intel® Itanium® processor. A separate item, How to Identify Back-End Bubbles on 64-Bit Intel® Architecture, shows how to ... Posted: 2009-01-16 10:55:45 by | itanium, performance, How-To |
| Perform Code Timing and Profiling for Linux on 64-Bit Architecture [Knowledgebase] Challenge Measure the time a program and its functions take to execute as part of the diagnosis phase of performance optimization. Such measurements are extremely valuable as a simple means to be ... Posted: 2009-01-26 15:58:59 by | itanium, performance, How-To |
| Prepare Applications for Optimization on 64-Bit Intel® Architecture [Knowledgebase] Challenge Prepare applications for optimization on the Intel® Itanium® processor family. The first issue in getting high performance code on Itanium-based systems is to get the code ported or w ... Posted: 2009-03-09 17:30:01 by | itanium, performance, How-To |
| Prioritize Bottlenecks on the Itanium Processor [Knowledgebase] Challenge Prioritize Performance Bottlenecks in terms of their impact on performance to support their resolution in order of importance. The key to optimizing an application is to use performance ... Posted: 2009-03-09 17:40:57 by | itanium, performance, How-To |
| Quantify Floating-Point Bank-Conflict Penalties on 64-Bit Intel Architecture [Knowledgebase] Challenge Measure the performance penalty associated with bank conflicts on floating-point loads. If you are dealing with a looping algorithm and have unrolled the loops (or if the compiler has d ... Posted: 2009-03-10 11:03:29 by | itanium, performance, How-To |
| Quantify the Penalty of Branch Misprediction on 64-Bit Architecture [Knowledgebase] Challenge Determine the performance penalty associated with the misprediction of a conditional branch on a processor based on 64-bit Intel® architecture. A separate item, How to Identify Branch ... Posted: 2009-02-27 10:11:36 by | itanium, performance, How-To |
| Resolve Back-End Bubbles on 64-Bit Intel® Architecture [Knowledgebase] Challenge Identify back-end bubbles (processor delays) in 64-bit applications and resolve them. Like any hardware platform, the Intel® Itanium® processor is dependent for performance upon the q ... Posted: 2008-12-05 13:22:18 by | itanium, performance, How-To |
| Schedule Instructions Optimally on 64-Bit Intel® Architecture [Knowledgebase] Challenge Schedule instructions properly for optimal performance on the Intel® Itanium® processor. Optimal scheduling will minimize the chances of implicit stops or unexpected dispersal-related ... Posted: 2009-03-10 15:21:56 by | itanium, performance, How-To |
| IPhone Performance [Knowledgebase] To obtain some useful workload information required installing a termal application on my iPhone and then remoting to it so that I could run TOP and at least see the basic system statistics in real ... Posted: 2008-10-09 16:12:24 by Dale Taylor (Intel) | workload, iphone, performance, apple |
| Apple iPhone Performance Study [Knowledgebase] iPhone Performance Study Jailbreaking the iPhone To enable access to the phone’s OS, you need to “Jailbreak” it. The iPhone is essentially a mini-mac like OS so many things learned develop ... Posted: 2008-10-13 14:27:15 by Dale Taylor (Intel) | jailbreak, iphone, performance, apple |
| AIR and Flash Performance on Moblin [Blogs] At Adobe MAX in November, Sean Christmann from effectiveui gave a fantastic presentation on Flash and AIR application performance. The typical view of performance optimization when dealing with any ru ... Posted: 2008-12-02 14:00:55 by Clayne Robison (Intel) | Adobe, Air, Flash 10, performance, atom, MID, flash |
| 5 minutes to understand video series - Intel(R) VTune Performance Analyzer [Videos] The "5 minutes to understand" series show how to use Intel(R) VTune(TM) Performance Analyzer, Thread Profiler and Thread Checker products. In these videos, you will learn the basics of the products an ... Posted: 2008-12-11 02:59:45 by Levent (Intel) | performance, software, Intel VTune, Vtune |
| 5 minutes to understand video series - Intel(R) Thread Checker [Videos] The "5 minutes to understand" series show how to use Intel(R) VTune(TM) Performance Analyzer, Thread Profiler and Thread Checker products. In these videos, you will learn the basics of the products an ... Posted: 2008-12-11 03:22:51 by Levent (Intel), Ralph Wargny (Intel) | tools, Visual Studio, Intel Thread Checker, performance, Thread Profiler, Vtune |
| Opencv and IPP Face Detection comparison [Forums] I am using Opencv face detection but its both speed and performance are not satisfactor and now I am planning to use Intel IPP Face detection. Would you please tell me the major difference between Ope ... Posted: 2009-04-12 21:31:22 by sharakubj | Training, utility, IPP, opencv, performance, Face, Compare, detection, cascade, difference |
| Putting -lm Before User Objects/Libraries on Link Line Can Impact Performance [Knowledgebase] Reference Number : DPD200121218Version : 11.0Operating System : Linux*Problem Description : Starting with 11.0.081, a fix was made to the compiler driver to link the Intel Math Library libim ... Posted: 2009-10-14 11:45:33 by Brandon Hewitt (Intel) | math, library, performance, static, libm, libimf, GNU, -lm |
| Infiniband-Intel MPI Performance MM5 [Forums] Dear colleagues,we are working in an Infiniband DDR cluster with MM5. We are using the latest Intel MPI and Fortran, and our mm5.mpp has been compiled with the configuration suggested in this website. ... Posted: 2009-05-26 00:58:06 by jriocaton.es | performance, InfiniBand, intel, MM5 |
| Performance problem involving mixed gcc/icc compilation [Forums] Greetings,I have been trying to use ICC on a large application and have comeacross some strange performance problems. I am using ICC 11.081,gcc 4.1.2p2 and Linux Red Hat Enterprise 5.I am compiling ... Posted: 2009-06-14 14:38:53 by cfspc | gcc, performance, gcc vs icc |
| New in Intel® MKL 10.2 [Knowledgebase] New in Intel® MKL 10.2: New features LAPACK 3.2 Introduced implementation of the DZGEMM Extended BLAS function (as described at http://www.netlib.org/blas/blast-forum/). See the description ... Posted: 2009-06-23 11:57:56 by Todd Rosenquist (Intel) | performance, new features |
| Virtualization and Performance: VM Time Drift [Blogs] An important issue to be aware of when measuring application performance on a virtualized system is that of time drift. A key responsibility of every VMM (hypervisor) is distributing clock ticks ge ... Posted: 2009-06-25 15:13:25 by David Ott (Intel) | virtualization, performance |
| Optimizing Open Source Citrix Xen* Code Base for Intelligent Performance [Videos] As the number one contributor to the Open Source Citrix Xen* code base, Intel collaborated with Citrix to optimize their software to take full advantage of the intelligent performance, virtualization, ... Posted: 2009-07-01 15:18:16 by | xeon, performance, Xen, Citrix, opensource |
| Power, Performance and Open Source [Videos] Ram Peddibhotla, Director of Intel’s Open Source Technology Center, discusses Intel’s longstanding contribution to the Open Source community in all areas of the stack to take best advantage of the ... Posted: 2009-07-07 14:02:35 by venkatrajaraman | open source, performance, Power |
| GPA 2.1 Feature Highlight: Pixel History based on Overdraw Visualization [Blogs] Pixel history has been the most requested feature from the gaming community since the launch of Intel GPA. The great news is that we have added this feature to our currently available 2.1 release. T ... Posted: 2009-08-14 09:38:32 by Chris Cormack (Intel) | performance, optimization, gaming, history, GPA, graphics, GPA 2.1, overdraw, pixel, pixel history |
| SSE optimizations and IEEE 754 [Forums] Hi,I'm using the options below as my best tradeoff between SSE performance and IEEE 754 conformance. Are there any other flags I could add that would bring me even closer to precise arithmetic witho ... Posted: 2009-08-24 14:54:06 by jeff_keasler | SSE, performance, IEEE floating point |
| GPA 2.1 Feature Highlight: Buffer Histograms [Blogs] GPA 2.1 includes a feature to allow you to better view render targets and textures. Let's say you have a texture with a very narrow dynamic range, all values in the texture are nearly white. When yo ... Posted: 2009-08-28 10:24:30 by Chris Cormack (Intel) | tools, 3d, performance, optimization, GPA, games, graphics, GPA 2.1, 3d games, performance tools |
| GPA 2.1 Feature Highlight: Configurable X and Y Axes in the Bar Chart [Blogs] In 2.1, GPA allows you to configure both the X and Y axis to any available metric within the bar chart. This allows you to visually see the relationship between multiple per-draw call metrics at the ... Posted: 2009-09-04 10:08:35 by Chris Cormack (Intel) | tools, performance, optimization, gaming, GPA, DirectX, D3D, GPA 2.1, 3d games |
| IBM DB2 9.7 on Intel Xeon Processor 5500 Series [Knowledgebase] Are you spending too much on your database? PROGRAMMING: Automated tuning features in DB2 9.7 outperformed expert IBM engineers. PERFORMANCE: Intel Xeon processor 5500 series delivers 9x the perfo ... Posted: 2009-09-18 10:34:00 by | xeon, performance, database |
| Come and See GPA 2.1 at IDF (San Francisco) [Blogs] If you are headed to IDF in San Francisco - stop and get a demo of GPA 2.1 on September 22nd or 23rd (Tuesday or Wednesday). [caption id="attachment_9909" align="alignnone" width="300" caption="GPA ... Posted: 2009-09-21 08:32:06 by Chris Cormack (Intel) | tools, 3d, performance, optimization, gaming, GPA, DirectX, 3D graphics, D3D, graphics, GPA 2.1 |
| Сервис удалённого тестирования производительности ПО на различных программно-аппаратных конфигурациях [Knowledgebase] Статья содержит описание сервиса, предоставляющего возможность разработчикам программного обеспечения про ... Posted: 2009-09-28 00:34:38 by shmaxim | Test, performance, Service, summer school |
| A program Harold Hill might like [Blogs] I just finished writing a 76 byte program. I gave my Computer Architecture midterm yesterday. One of the four problems was to predict the output of a 17 byte program. This is with an assembly langu ... Posted: 2009-11-03 16:15:44 by wolfmurphy | High performance computing, performance, Academic, Parallel Prog. & Multi-Core |
| Mobile and Netbook optimization blogs posted on the Atom Developer site [Blogs] A few weeks back I posted a few blogs to the Atom Developer site that contained useful information about optimizing for small mobile form factor devices. I wanted to give a brief mention of those bl ... Posted: 2009-11-11 14:09:34 by Dale Taylor (Intel) | performance, Intel Atom, Power, UI, mobile, optimize |