Time for another episode of Parallel Programming Talk – This is show #114. Intel Software Engineer Rich Hubbard is here to talk about AVX.
What is Clay Thinking About? Segment
Kathy: The International Supercomputing Conference was held this week and that is where the summer version of the Top500 list is revealed. Clay, have you seen the new Top500 list?
Intel vient de rendre publique les détails sur la prochaine génération des architectures X86. Arrivant en premier dans nos microarchitectures Intel en 2013 sous le nom de code "Haswell", les nouvelles instructions accèlerent une large catégorie d'applications et de modèles d'usage. Téléchargez la référence de programmation Intel® Advanced Vector Extensions Programming (319433-011).
If we ask anyone who uses or plans to use or just advertises the intrinsic compiler functions for SIMD support (MMX, SSE, AVX): why do you do so, why it is good? The answer definitely will be something like this:"Intrinsics provide a C/C++ language interface to assembly instructions, so that we don't need to deal with assembler".
As you may have already read in a previous post called Personal Review of Intel Under-NDA Sandy-Bridge Event I held the last session in an Intel-Under-NDA event. The presentation was called Performance and covered the different aspects of parallel computing and also the new Sandy Bridge AVX Instructions.
Early this month Intel held an event about the Sandy Bridge architecture and other near future developments. Attendees signed an NDA before entering the event and the material presented was really interesting to hear. The room was packed to no room with what looked to me like over 500 people sitting and listening.
With the launch of the Second Generation Intel® CoreTM processor (utilizing the new Intel® processor microarchitecture codename Sandy Bridge), Intel released Intel Advanced Vector Extensions (Intel AVX) which extends the capabilities of Intel® Streaming SIMD Extensions (Intel® SSE), especially for floating point data and operations. Intel AVX significantly increases the floating-point performance density with improved power efficiency over previous 128-bit SIMD instruction set extensions.