Intel

Intel ® Software Network

Intel Software TV

Levels of concurrency: an example using both instruction and thread level parallelism

  • August 24, 2011
  • Michael Wrinn (Intel)
  • Download

Dr. Michael Wrinn, Senior Course Architect with the Intel(R) Academic Community, opens up his series on topics in parallelism with a discussion on mapping between software strategies for concurrency and the underlying multi-core architecture. Concur

Expand Description Collapse Description
Dr. Michael Wrinn, Senior Course Architect with the Intel(R) Academic Community, opens up his series on topics in parallelism with a discussion on mapping between software strategies for concurrency and the underlying multi-core architecture. Concurrency is available at multiple levels in modern multi-core platforms. This brief talk uses a Monte Carlo Calculation to demonstrate concurrency achievable at both the microarchitecture level (using, in this case, Streaming SIMD Extensions) as well as by multiple cores. In addition, Intel(R) MKL library functions are employed to ensure thread safety.

Leave a Comment

To obtain technical support, please go to Software Support

Date Added | Popularity