Intel

Intel ® Software Network

Language:
English

Intel Software TV

Parallel Programming

Home › Software TV

Teach Parallel: Developing a Curriculum for Parallelism Part 9

  • Segment 8 of 9
  • August 24, 2011
  • pez13
  • Download

Time is no longer a best performance programming tool, by just waiting 18 months for a doubling of performance. The discussion initiated by last year's panel led to the conclusion that parallelism must seamlessly be woven throughout the CS curri

Expand Description Collapse Description
Time is no longer a best performance programming tool, by just waiting 18 months for a doubling of performance. The discussion initiated by last year's panel led to the conclusion that parallelism must seamlessly be woven throughout the CS curriculum. This year provides a diabolic panel focused on details; the six panelists will spend 5 minutes each describing what needs to be done, what they have done, and what they plan to do. The second half will be another near free-for-all with the room and the panelists further discussing these hard to implement simply stated goals.

Panelists include: Tom Murphy-Contra Costa College, Robert Chesebourgh-Intel Academic Program, Dr. Jim Larus-Microsoft Research, Dr. John Gustafson-Intel Labs, Dr. Bill Dally-NVIDIA, Dr. Simon McIntosh Smith-Bristol University, Charles Peck-Earlham College

Leave a Comment

To obtain technical support, please go to Software Support

Date Added | Popularity
Date Series Author
November 8, 2011 Using Intel VTune Amplifier XE to Tune Software on the 2nd Generation Intel Core Processor Family
  • 1
    This video explains the tuning methodology we recommend for using Intel VTune Amplifier XE to tune software on Intel Microarchitecture Codename Sandy Bridge.
  • 2
    This video walks you through using the new Intel VTune Amplifier XE interface and analysis features for Intel Microarchitecture Codename Sandy Bridge.
 Shannon Cepeda (Intel)
August 24, 2011 Gaming Architecture: Why Parallelism is Important
  • 1
    Task and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avai
  • 2
    Task and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avai
  • 3
    Task and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avai
  • 4
    ask and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avail
  • 5
    Task and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avai
  • 6
    Task and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avai
  • 7
    Task and domain decompositions are two basic and powerful approaches of exploiting parallelism in a given problem. An effective decomposition requires careful partitioning of tasks and data, and a balanced mapping of these partitions across the avai
 Jerry Makare (Intel)
August 24, 2011 Suddenly All Computing is Parallel: Seizing Opportunity Amid the Clamor
  • 1
    Michael Wrinn\'s Keynote from SIGCSE 2010. The shift in computing hardware to parallel systems is well underway. Sequential chips are no longer designed, and the proud era of von Neumann architecture passes into history. Foundational change of t
  • 2
    hael Wrinn's Keynote form SIGCSE 2010. The shift in computing hardware to parallel systems is well underway. Sequential chips are no longer designed, and the proud era of von Neumann architecture passes into history. Foundational change of this
  • 3
    Michael Wrinn's keynote from SIGCSE 2010. The shift in computing hardware to parallel systems is well underway. Sequential chips are no longer designed, and the proud era of von Neumann architecture passes into history. Foundational change of th
  • 4
    Michael Wrinn's keynote from SIGCSE 2010. The shift in computing hardware to parallel systems is well underway. Sequential chips are no longer designed, and the proud era of von Neumann architecture passes into history. Foundational change of th
 Jerry Makare (Intel)
1-3 of 3

© Intel Corporation