Zona para desarrolladores Intel®:
Intel® AVX

Declaración de visión

La necesidad de un mayor desempeño computacional sigue creciendo en todos los segmentos de la industria. Para la compatibilidad ante la creciente demanda y los modelos de uso en evolución, continuamos nuestra historia de innovación con  Intel® Advanced Vector Extensions (Intel® AVX).

Intel® AVX es una nueva extensión del conjunto de instrucciones de 256 bits para Intel® SSE y se diseñó para aplicaciones que usan Floating Point (FP - Punto flotante) de manera intensa. Se lanzó al mercado a principios del año 2011 como parte de la familia de procesadores de la microarquitectura Intel ®, con el nombre de código 'Sandy Bridge', y se encuentra en plataformas que abarcan desde notebooks a servidores. Intel AVX mejora el desempeño gracias a vectores más anchos, nueva sintaxis ampliable y funcionalidad enriquecida. Esto resulta en una mejor administración de los datos y las aplicaciones para fines generales como el procesamiento de imágenes, sonido/video, simulaciones científicas, análisis financieros, y modelos y análisis tridimensionales.

Descripción general

Herramientas y descargas

  • Intel® C++ Compiler

    Intel® C++ Compiler está disponible para ser descargado del centro Intel® Registration Center para todos los clientes con licencias. Las versiones de evaluación de los Productos Intel® de desarrollo de software también están disponibles para una descarga gratis.

  • Intel Intrinsics Guide

    La Guía de Intel Intrinsics es una herramienta de referencia interactiva para las instrucciones intrínsecas de Intel, las cuales son funciones de estilo C que proporcionan acceso a muchas instrucciones Intel, incluyendo las instrucciones Intel® Streaming SIMD Extensions [XX] (Intel® SSE[XX]), Intel® Advanced Vector Extensions (Intel® AVX), y muchas más, sin necesidad de escribir el código de ensamblaje.

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    • Guía de Intel Intrinsics (Windows*)
27-Abr-2012
5:40 PM PDT
A Guide to Auto-vectorization with Intel® C++ Compilers
By mark-sabahi (Intel)4
How to use the automatic vectorizer of the Intel® C/C++ Compiler to optimize your application using Intel Streaming SIMD Extensions (Intel SSE) or Intel Advanced Vector Extensions (Intel AVX).
05-Mar-2012
9:00 PM PST
Benefits of Intel® Advanced Vector Extensions For Quaternion Spherical Linear Interpolation (Slerp)
By Pallavi Mehrotr...6
Intel® AVX is a 256 bit instruction set extension to Intel® SSE and is designed for floating point intensive applications. This article examines how Intel® AVX micro architecture features benefit Spherical Linear Interpolation (SLERP) opserations.
09-Feb-2012
3:42 PM PST
Wiener Filtering Using Intel® Advanced Vector Extensions
By Kit Chung (Intel)0
Wiener filtering (also known as Least Mean Square filtering) is a technique for removing unwanted noise from an image. This article discusses Wiener filtering, and includes an example of code that has been optimized using Intel® AVX
09-Feb-2012
3:40 PM PST
Utilizing Intel® AVX with Cakewalk SONAR* X1
By Rajshree Chabuk...0
SONAR* is Cakewalk's technology-leading digital audio workstation and runs natively on Intel® Core™ platforms. SONAR's processing of audio buffers for mixing and DSP as well as various data and bit depth conversions was updated to use Intel® AVX.

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Jeff's Notebook: 3D Vector Normalization Using 256-Bit Intel® Advanced Vector Extensions (Intel® AVX)
By Jeff Kataoka (Intel)Posted Febrero 11th 20110
With the launch of our New Second Generation Intel® Core processor, there has been a lot of interested in the Intel® Advanced Vector Extensions (Intel® AVX). I decided to investigate more on how application developers targeting the Second Generation Intel core processor for their application might ...
Visual Studio 2010 Built-in CPU Acceleration
By Asaf ShellyPosted Diciembre 20th 20105
Writing the sample code for this post I was amazed myself to see how simple it was to reach over 20 times performance improvement with so little effort.    The motivation is a very heavy video processing algorithm created for HD TV. This means hi-resolution which means many pixels to compute and ...
New Parallel Studio: Intel Parallel Studio 2011
By James Reinders ...Posted Septiembre 14th 20101
This month, we introduced Intel Parallel Studio 2011. It is a very worthy successor to the original Intel Parallel Studio by expanding both on the tooling and the parallel programming models it offers. On the tooling, we have the Intel ...
Parallel Programming Talk #62 - What Every Software Developer Should Know About Intel AVX
By aaron-tersteeg ...Posted Febrero 3rd 20100
Welcome to Show 62 of Parallel Programming Talk. Today is February 2nd. Groundhog day in the United States. On this episode Clay and Aaron will be addressing recent questions about what every software developer should know ...

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sandhya p.Dom, Mayo 12th 2013 - 4:09
8086/8088 core9
Hi,  I am a grad student in EE. I am looking for 8088/8086 core for my project. Project is to design a bus monitor which can interface with either 8088/8086. I searched on opencore.org but could not find. I am looking for one which has all pins exposed - ALE, RD, WR, DEN, Addr/Data etc.  Please can ...
zlwVie, Mayo 10th 2013 - 16:21
with _mm256 instruction, does it matter to use -xAVX to compiler?12
I wrote some AVX instructions like :     __m256 x0 = _mm256_load_ps(f);    __m256 y0 = _mm256_load_ps(f+8);    __m256 z0 = _mm256_add_ps(x0, y0);    _mm256_store_ps( s, z0); When I compiler this, does it matter whether I use -xAVX compiler option or not? I am using icpc 2013 on Linux  
zalia64Mar, Mayo 7th 2013 - 22:41
64-bit bug in Visual C++? mov R8d,imm not completley defined12
The Intel  documentation does not specify wether  mov R8d , -1  will also zero the high dword of R8, or leave it intact.  The Microsoft Visual C++  (2010)  translate the C line  a = myfunc(par1, par2, 3) ; into          mov RCX, par1 ; mov RDX, par2 ;   mov R8b, 3 ;    call myfunc;    move qword ...
maratyszczaMié, Mayo 1st 2013 - 16:06
Haswell RCPPS/RSQRTPS implementation16
Hi, I work on code which targets AVX2 + FMA3 and depends on the accuracy of VRCPPS/VRSQRTPS. Should I expect the implementation of these instructions on Haswell to be the same as on Ivy Bridge? Regards, Marat

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