Dave,

I'mvery sorry butthis BIOS does not support access to the required counters. We are trying to get this changed but it might help if you request the same from your side.

Kind regards
Thomas

I'm also getting this.

Linux 2.6.32-279.11.1.el6.x86_64 x86_64
SM X9DRG-QF motherboard, with the 1.0c (A18) Bios revision. Does SM in general not support QPI counters?

ERROR: QPI LL counter programming seems not to work. Q_P0_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices.

Assuming that the problem is in the hands of SM, are you saying you want people to bug SM until they code for this feature?

Is there a list of motherboard/BIOS that supports these counters? I'm also interested in getting DRAM energy information from PCM.

Thank you.

Hi Jee C.,

I am not aware of such list. There is another thread on how to enable DRAM energy counters (read by PCM) on an Intel board here.

Roman

>>>The rest of the output looks nominal.

I can't find any such settings on my BIOS.>>>

BIOS is not needed to access Uncore control monitor registers.Every access is done by the kernel mode driver(Windows platform).

Hi,

I am getting simillar problem. The system reports

 ./pcm.x 1

Intel(r) Performance Counter Monitor V2.35 (2013-01-23 13:28:21 +0100 ID=75f74dd)

Copyright (c) 2009-2012 Intel Corporation

Num (logical) cores: 24
Num sockets: 2
Threads per core: 2
Core PMU (perfmon) version: 3
Number of core PMU generic (programmable) counters: 4
Width of generic (programmable) counters: 48 bits
Number of core PMU fixed counters: 3
Width of fixed counters: 48 bits
Nominal core frequency: 2500000000 Hz
Package thermal spec power: 95 Watt; Package minimum power: 46 Watt; Package maximum power: 150 Watt;
Using PCM on your system might have a performance impact as per http://software.intel.com/en-us/articles/performance-impact-when-samplin...
You can avoid the performance impact by using the option --noJKTWA, however the cache metrics might be wrong then.
ERROR: QPI LL counter programming seems not to work. Q_P0_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2).
ERROR: QPI LL counter programming seems not to work. Q_P1_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2).
ERROR: IMC counter programming seems not to work. MC_CH0_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices.
ERROR: IMC counter programming seems not to work. MC_CH1_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices.
ERROR: IMC counter programming seems not to work. MC_CH2_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices.
ERROR: IMC counter programming seems not to work. MC_CH3_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices.
ERROR: QPI LL counter programming seems not to work. Q_P0_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2).
ERROR: QPI LL counter programming seems not to work. Q_P1_PCI_PMON_BOX_CTL=0xffffffff
Please see BIOS options to enable the export of performance monitoring devices (devices 8 and 9: function 2).
Max QPI link speed: 14.4 GBytes/second (7.2 GT/second)

Detected Intel(R) Xeon(R) CPU E5-2640 0 @ 2.50GHz "Intel(r) microarchitecture codename Sandy Bridge-EP/Jaketown"

Any idea on How I can resolve this?

BIOS details are as follows

Vendor: Dell Inc.
Version: 1.5.0

Thanks 

Rakhi

>>>ERROR: IMC counter programming seems not to work. MC_CH2_PCI_PMON_BOX_CTL=0xffffffff Please see BIOS options to enable the export of performance monitoring devices>>>

IIRC those registers are eccessesd from PCI address space and it is quite possible that somehow BIOS is invovlved in it.

It there any update towards this problem? I think plenty of users are concerning this now. Thanks.

I think that BIOS code did not enable exporting QPI Port0 and Port1 PMON counters.There is no bus number to access Port0 and Port1 registers in official Intel documentation.One of the option is to access pci config space and try to enable export of performance monitoring devices, but as I said earlier there is no bus number so how the proper address can be composed?More advanced option will be use windbg in kernel mode and dump pci address space with !pci command.

In this case a BIOS upgrade is required.  Once the BIOS locks the corresponding memory-mapped IO regions they cannot be accessed by the kernel and the lock on those addresses can only be modified in SMM (BIOS) code.

Quote:

jdmccalpin wrote:

In this case a BIOS upgrade is required.  Once the BIOS locks the corresponding memory-mapped IO regions they cannot be accessed by the kernel and the lock on those addresses can only be modified in SMM (BIOS) code.

I thought that somehow SMM is involved in configuration of some part of I/O addressing space.There is possibility to write its own handler , but it must be executed before OS bootup from within BIOS code.