Serveur
Meshcentral.com - New Mesh Graph
I am glad to annonce a new Mesh graph feature into Meshcentral.com. When you install mesh agents in computers, the agents form a mesh, discovering and monitoring each other. Well, it's not important to know the details of how the mesh is formed, but just for fun, I added a way to visualize the mesh nodes and links between nodes.
What's new? Update 7 - Intel® VTune™ Amplifier XE 2013
Intel® VTune™ Amplifier XE 2013
Intel® VTune™ Amplifier XE is an easy to use performance and thread profiler for C, C++, C#, Fortran, Java and MPI developers. No special recompiles are needed, just start profiling. Hotspots are highlighted on the source. A powerful timeline makes it easy to tune your application and scale performance on multicore processors.
Intel® Xeon Phi™ coprocessor Power Management Part 1: P-States, Reducing power consumption without impacting performance
Right up front, I am going to tell you that P-states are irrelevant, meaning they will not impact the performance of your HPC application. Nevertheless, they are important to your application in a more roundabout way. Since most of you belong to a group of untrusting and always questioning skeptics (i.e. engineers and scientists), I am going to go through the unnecessary exercise of justifying my claim.
Speeding Up Your Cloud Environment On Intel® Architecture
In my previous blog, I discussed “Ways to Speeding up Your Cloud Environment…”, I will continue with this thread by introducing the topic of Software Defined Networks (SDN). The industry has been depending on proprietary networking equipment and appliances, essentially creating an environment requiring vertical integrated software running on dedicated hardware.
Enabling Connectionless DAPL UD in the Intel® MPI Library
What is DAPL UD?
Traditional InfiniBand* support involves MPI message transfer over the Reliable Connection (RC) protocol. While RC is long-standing and rich in functionality, it does have certain drawbacks: since it requires that each pair of processes setup a one-to-one connection at the start of the execution, memory consumption could (at the worst case) grow linearly as more MPI ranks are added and the number of pair connections grows.
A case study comparing AoS (Arrays of Structures) and SoA (Structures of Arrays) data layouts for a compute-intensive loop run on Intel® Xeon® processors and Intel® Xeon Phi™ product family coprocessors
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