I wanted to experiment with DVFS on Intel SandyBridge and through the Intel Manual 3B, I see that the DVFS is achieved on SandyBridge using Enhanced Intel SpeedStep.
It says that IA32_PERF_CTL could be set to achieve DVFS. However the Manual does not explain how to set the lower 16 bits in IA32_PERF_CTL to achieve this. I went across searching on different forums to ascertain how to set this to no avail. However, what I could learn is that the 16 bits are divided into two 8-bit blocks that specify the Multiplier and VID.