This is the first article in a series of articles about High Performance Computing with the Intel Xeon Phi. The Intel Xeon Phi is the first commercial product of Intel to incorporate the Many Integrated Core architecture. In this article I will present the basics of the Xeon Phi architecture, the programming models and what we can do to measure the performance in cycles for micro benchmarks.
Intel® Cilk™ Plus
Intel Xeon Phi Coprocessor April 2013 Developer Webinar Q&A Responses
Answers for the questions raised during the April session of our Introduction to High Performance Application Development for Intel® Xeon® & Intel® Xeon Phi™ processors class have been assembled. There were some duplicates and other questions we couldn't decipher, either because of the wording or because of implied context that was not spelled out. We tried to address the rest, which appear below:
Cilk Screen Part II: I found a race. Now what do I do?
This is the second article in a series on the Cilk Screen Race Detector. The previous article, An Introduction to the Cilk Screen Race Detector, described:
Intel® Xeon® & Xeon® Phi™ Webinar
This two day webinar series introduces you to the world of multicore and manycore computing with Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors.
This page contains replays of multiple sessions covering a variety of topics as listed below:
An Introduction to the Cilk Screen Race Detector
One of the pitfalls of parallel programming is the need to consider whether your code modifies a memory location in two parallel strands. Doing so is called a race because whether you get the correct answer depends on the timing of the executed instructions. Parallel reads are OK, since the value doesn’t change. But two writes, or a read and a write in parallel are errors. Consider the following code which increments a global location:
Using Pedigrees in Intel® Cilk™ Plus
Pedigrees are a new feature implemented in Intel Cilk Plus and currently available in Intel® Composer XE 2013. In this post, I explain what pedigrees are, how they work, and how you can use them in Cilk Plus. Pedigrees are a key component used in the implementation of DotMix, a contributed code for a deterministic parallel random-number generator (DPRNG) discussed in my previous post.
Parallel sorts for Cilk Plus
This article describes the parallel sorts in the latest release of “Cilkpub”, an open-source library of utilities for Intel® Cilk™ Plus.
cilk_sortcilk_sort_in_place
They are designed to be replacements for std::sort that may provide speedup when sorting many items (on the order of at least 10000). For example:
extern float a[]; cilkpub::cilk_sort( a, a+n );
Intel Software Tools Spring Technical Webinar Series
This free webinar series presents tools, tips, and techniques that will help sharpen your development skills on developing and improving your high performance compute applications for multicore and manycore on Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors. Expert technical teams at Intel as well as open source innovators discuss development tools, programming models, vectorization and execution models that will get your development efforts powered up to get the best out of your applications and platforms.
A DPRNG for Cilk™ Plus?
Continuing my previous post, I describe some of the challenges in implementing DotMix, a determinstic parallel random-number generator (DPRNG) for Intel® Cilk™ Plus.
New Contributed Code for Cilk™ Plus: DotMix, a Deterministic Parallel Random-Number Generator
DotMix is a new user-contributed code that provides programmers with a repeatable but efficient way to deterministically generate pseudorandom numbers in parallel in Intel® Cilk™ Plus. In this post, I explain what "contributed code" is, where it comes from, and give a brief preview of DotMix.
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