Intel PCM - Does PCM support X5570 memory controller?

Intel PCM - Does PCM support X5570 memory controller?

Ritratto di GHui
GHui
Lun, 06/02/2012 - 23:41

CPU: Intel Xeon CPU X5570 @ 2.93GHz
PCM Version: 1.7
OS: rhel6.0

------------------
Core (SKT) | EXEC | IPC | FREQ | AFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3CLK | L2CLK | READ | WRITE

0 0 0.00 0.18 0.00 0.55 3010 3010 0.00 1.00 0.04 0.00 N/A N/A
1 0 0.00 0.38 0.00 0.55 804 804 0.00 1.00 0.05 0.00 N/A N/A
2 0 0.00 0.68 0.00 0.55 659 659 0.00 1.00 0.02 0.00 N/A N/A
3 0 0.00 0.21 0.00 0.55 912 912 0.00 1.00 0.07 0.00 N/A N/A
4 1 0.00 0.25 0.00 0.55 1350 1841 0.27 1.00 0.02 0.00 N/A N/A
5 1 0.00 0.20 0.00 0.55 1023 1023 0.00 1.00 0.07 0.00 N/A N/A
6 1 0.00 0.15 0.00 0.55 506 506 0.00 1.00 0.03 0.00 N/A N/A
7 1 0.00 0.44 0.00 0.55 958 8395 0.89 0.97 0.08 0.13 N/A N/A
------------------------------------------------------------------------------------------------------------
SKT 0 0.00 0.33 0.00 0.55 5345 5345 0.00 1.00 0.04 0.00 0.00 0.00
SKT 1 0.00 0.25 0.00 0.55 3803 11 K 0.68 1.00 0.03 0.01 0.00 0.00
------------------------------------------------------------------------------------------------------------
TOTAL * 0.00 0.29 0.00 0.55 9118 17 K 0.47 1.00 0.04 0.01 0.00 0.00

--GHui
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Ritratto di GHui
GHui
Mar, 07/02/2012 - 00:11

I use PCM-1.7 to monitor X5570(Nehalem-EP). The READ and WRITE value column display N/A. PCM doesn't support memory bandwidth?

--GHui
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Ritratto di Thomas Willhalm (Intel)
Thomas Willhalm (Intel)
Mar, 07/02/2012 - 00:39

Yes, the Intel Xeon processor 5500 series is supported. owever, the memory traffic is measured in the memory controller. Therefore it is not possible to measure it on a core basis, but only on a socket basis.

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Ritratto di GHui
GHui
Mar, 07/02/2012 - 01:12

I'm not familiar with 'QPI data' and 'Memory controller'. How can I understand the 'QPI data traffic/Memory controller traffic'?

--GHui
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Ritratto di Roman Dementiev (Intel)
Roman Dementiev (Intel)
Mer, 08/02/2012 - 11:53

GHui,

you can consult wikipedia articles on memory controller and QPI (Intel QuickPath Interconnect). The ratio QPI data traffic/ memory controller traffic is a metric to measure NUMA (Non-Uniform Memory Access)friendliness of applications. Memory bandwidth intensive applicationswork fasterif theyaccess mostly local memory (from local memory controller) and not remote memory from memory controller at a different processor/socket - which is slower. Data access to remote memory goes through QPI links.Applications accessing mostly local memory are NUMA-friendly; they donot utilize QPI links much. The metric you are asking about should be near 0 for NUMA-frienly applications. If the value tends to be closer to 1 or even greater, then you application is not particular NUMA-friendly (lots of data need to be transfered through QPI links compared to total memory controller traffic).

Roman

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