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Appena pubblicato! Intel® Xeon Phi™ Coprocessor High Performance Programming 
Nozioni di base sulla programmazione per questa nuova architettura e nuovi prodotti. Novità!		 Intel® System Studio
Intel® System Studio è una soluzione completa di suite integrate di strumenti per lo sviluppo del software che può accelerare i tempi di commercializzazione, rafforzare l'affidabilità del sistema e migliorare l'efficienza energetica e le prestazioni. Novità!
Nel caso vi sia sfuggito: 2 giorni di riproduzione del webinar dal vivo
Introduzione allo sviluppo di applicazioni a prestazioni elevate per i coprocessori Intel® Xeon® e Xeon Phi™		 Structured Parallel Programming
Gli autori Michael McCool, Arch D. Robison e James Reinders usano un approccio basato su modelli strutturati che dovrebbero rendere l'argomento accessibile a ogni sviluppatore di software.

Offrite ai clienti applicazioni dalle prestazioni massime grazie all'uso della programmazione parallela con le risorse innovative di Intel.

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28-Mar-2013
3:02 PM PDT
Differences in Floating-Point Arithmetic Between Intel® Xeon® Processors and the Intel® Xeon Phi™ Coprocessor
By Martyn Corden (...0
Download Article Download Differences in Floating-Point Arithmetic Between Intel® Xeon® Processors and the Intel® Xeon Phi™ Coprocessor . . .
26-Mar-2013
1:19 PM PDT
Parallel fault simulation algorithm for multi-core systems with common memory
By Admin0
Fault simulation for sequential circuits numbers among the highly compute-intensive tasks in the integrated circuit design process. In this paper we propose a new parallel fault simulation algorithm for multi-core workstations with common memory. We use dynamic fault grouping for each input test . . .
26-Mar-2013
9:27 AM PDT
The Importance of Vectorization for Intel® Many Integrated Core Architecture (Intel® MIC Architecture) (Fortran Example)
By Martyn Corden (...0
Reference Link and Download Intel Vectorization ToolsCode tarball [TAR 16KB] Introduction To get good performance out of the Intel® Many . . .
22-Mar-2013
10:00 AM PDT
A DPRNG for Cilk™ Plus?
By Jim Sukha (Intel)0
Continuing my previous post, I describe some of the challenges in implementing DotMix, a determinstic parallel random-number generator (DPRNG) for Intel® . . .

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The Intel® Xeon Phi™ coprocessor: What is it and why should I care? Part 0: Introduction
By Taylor Kidd (Intel)Posted Marzo 18th 20130
PART 0: “Introduction” Believe it or not, this small series of 4 blogs (including this introduction) started off as a movie script. Yes, I admit to this being a little bit of an exaggeration. The “movie” will ultimately consist of two 10-minute short videos. After having struggled with writing ...
New Contributed Code for Cilk™ Plus: DotMix, a Deterministic Parallel Random-Number Generator
By Jim Sukha (Intel)Posted Marzo 8th 20130
DotMix is a new user-contributed code that provides programmers with a repeatable but efficient way to deterministically generate pseudorandom numbers in parallel in Intel® Cilk™ Plus. In this post, I explain what "contributed code" is, where it comes from, and give a brief preview of DotMix.
Optimization of a Parallel Application for Multi-Core Environments
By Vikram Shankar ...Posted Marzo 4th 20130
(This work was done by Vivek Lingegowda during his internship at Intel.) From Amdahl's law we know that the performance of a parallel application in a multicore environment is limited by its non-parallel part. Parallel applications inescapably have non-parallel parts that form bottlenecks while ...
Optimization of Data Read/Write in a Parallel Application
By Vikram Shankar ...Posted Marzo 4th 20131
(This work was done by Vivek Lingegowda during his internship at Intel.) When parallel applications have to initialize their data from file as their input or write result data to file as their output, when not optimized, the data read/write can become a limiting factor for the multi-threaded ...

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rakkotaVen, Gennaio 25th 2013 - 9:05
plain function names in binaries when using OpenMP2
Hi, I found that function names appear as is in the release binaries if a OpenMP loop has been defined inside. Moreover, paths from the build machine and code line numbers are also indicated. For example, using FORTRAN compiler 10.0.025 in an executable I've got: ;D:\cygwin\home\build\dev\tags\ ...
T. H. BlackMer, Gennaio 9th 2013 - 6:02
Concurrent stores seen in a consistent order3
The Intel Architectures Software Developer's Manual, Aug. 2012, vol. 3A, sect. 8.2.2: Any two stores are seen in a consistent order by processors other than those performing the stores. ...
www q.Sab, Dicembre 15th 2012 - 15:09
Which strategy is better fit for recent Intel CPUs?5
Regarding performance, assuming we get a block of data that will be freqenctly accessed by each threads, and these data are read-only, which means threads wont do anything besides reading the data, then is it benefitial to create one copy of these data (assuming the data there read-only, and the ...
zhengda1936Ven, Dicembre 14th 2012 - 13:01
The best method for inter-processor data communication34
Hello, I measure the performance of memory copy in a NUMA machine with 4 Xeon(R) CPU E5-4620 processors. When I copy data in the local memory, I can get up to almost 10GB/s. However, when I copy data from remote memory, I get much worse performance, only around 1GB/s. I use memcpy() to copy data ...

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