Intel® IPP library is optimized for Intel and compatible processors. It is OK to use IPP library on either Intel processors or compatible AMD* processors, both 32-bit and 64-bit processor.

Actually, IPP library dispatches optimized code according to detected processor features (mainly the feature of SIMD instruction set) automatically as the below table shows or see the article Understanding CPU Dispatching in the Intel® IPP Library.  

For example, if your 32-bit application runs on an Intel® Core^TM 2 Duo CPU (e.g., T7300 @ 2.0GHzp), which supports MMX, SSE, SSE2, SSE3 and SSSE3, the "v8" library will be automatically selected by the dispatcher as the optimum IPP library solution. If your 32-bit application is running on an AMD Athlon64^TM 6400+, which supports MMX, SSE, SSE2 and SSE3, the dispatcher will automatically select the "t7" version of the IPP library as the optimum solution.

On 64bit processors, most AMD* 64-bit processors support SSE3, so when running 64-bit application the "m7" version of the IPP library will be dispatched automatically. Otherwise "mx" library will be used.

In summary, when using the Intel IPP library, your program will automatically adapt at run time to select those functions that are optimized for your platform, whatever Intel processor or compatible AMD processor.

For which SIMD instruction set is supported by your processor, please see "Is there any function to detect processor type from Intel IPP?"

For more information regarding the IPP dispatcher, please read this article about the ippInit functions.

Processor Architecture Table

The following table was copied from an Intel Compiler Pro options article describing some compiler architecture options. It contains a fairly complete list of which Intel processors support which SIMD instructions. For the latest table please refer to the original article; it gets updated on a regular basis. Please note that the behavior of the Intel Compiler SIMD dispatcher described in that article does not apply to the Intel IPP library. The Intel IPP library dispatching mechanism behaves differently than that found in the Intel Compiler products, and may behave differently than other Intel library products.

SSE4.2
Intel® Core^TM i7 Processors
Intel® Xeon® 55XX series

SSE4.1
Intel® Xeon® 74XX series
Quad-Core Intel® Xeon 54XX, 33XX series
Dual-Core Intel® Xeon 52XX, 31XX series
Intel® Core^TM 2 Extreme 9XXX series
Intel® Core^TM 2 Quad 9XXX series
Intel® Core^TM 2 Duo 8XXX series
Intel® Core^TM 2 Duo E7200

SSSE3
Quad-Core Intel® Xeon® 73XX, 53XX, 32XX series
Dual-Core Intel® Xeon® 72XX, 53XX, 51XX, 30XX series
Intel® Core^TM 2 Extreme 7XXX, 6XXX series
Intel® Core^TM 2 Quad 6XXX series
Intel® Core^TM 2 Duo 7XXX (except E7200), 6XXX, 5XXX, 4XXX series
Intel® Core^TM 2 Solo 2XXX series
Intel® Pentium® dual-core processor E2XXX, T23XX series

SSE3
Dual-Core Intel® Xeon® 70XX, 71XX, 50XX Series
Dual-Core Intel® Xeon® processor (ULV and LV) 1.66, 2.0, 2.16
Dual-Core Intel® Xeon® 2.8
Intel® Xeon® processors with SSE3 instruction set support
Intel® Core^TM Duo
Intel® Core^TM Solo
Intel® Pentium® dual-core processor T21XX, T20XX series
Intel® Pentium® processor Extreme Edition
Intel® Pentium® D
Intel® Pentium® 4 processors with SSE3 instruction set support

SSE2
Intel® Xeon® processors
Intel® Pentium® 4 processors
Intel® Pentium® M

IA32
Intel® Pentium® III Processor
Intel® Pentium® II Processor
Intel® Pentium® Processor

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