hi all,
On dual xeon e5-2620 server, pci device 8 function 2 is missing. If I am right, QPI perfmon registers fall into pci configuration space at function 2 of dev8 and dev9. Is it becaused this function is hidden? If it is, where is the control bit hiding this function?
Thanks
Did you consult Xeon e5 - 2600 Uncore performance guide?
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iliyapolak wrote:Did you consult Xeon e5 - 2600 Uncore performance guide?
Sure, the guide says this, but the function is missing on my server. So I am guessing it is hidden.
What is that function responsible for?
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iliyapolak wrote:What is that function responsible for?
QPI performance monitors
Did you consult Intel SDM?I do not believe that SDM has such a information because the function mentioned by you falls into pci address space.I think that trying to look it up in chipset datasheet should be done also.
I'm thinking how to scan Port0 and Port1 which corresponds to Dev8 and Dev9 with kernel debugger unfortunately there is no any information about the bus number and register offset of the function 2.
Many BIOS implementations do not allow access to PCI Config space devices 8/9, functions 2/6, which contain the interfaces to the QPI link layer performance counters and mask/match registers. This appears to be due to a miscommunication between Intel and the BIOS developers because (as can be seen in the Xeon E5-2600 uncore guide) these were intended to be made accessible. The only option is to upgrade the BIOS....
>>>The only option is to upgrade the BIOS....>>>
I got the response from one of the Intel engineers on IDZ and he told me that BIOS developers are not obligated by Intel to enable access to QPI interface.