xed-encoder-iforms.h

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00001 /*BEGIN_LEGAL 
00002 Intel Open Source License 
00003 
00004 Copyright (c) 2002-2015 Intel Corporation. All rights reserved.
00005  
00006 Redistribution and use in source and binary forms, with or without
00007 modification, are permitted provided that the following conditions are
00008 met:
00009 
00010 Redistributions of source code must retain the above copyright notice,
00011 this list of conditions and the following disclaimer.  Redistributions
00012 in binary form must reproduce the above copyright notice, this list of
00013 conditions and the following disclaimer in the documentation and/or
00014 other materials provided with the distribution.  Neither the name of
00015 the Intel Corporation nor the names of its contributors may be used to
00016 endorse or promote products derived from this software without
00017 specific prior written permission.
00018  
00019 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00020 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00021 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
00022 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR
00023 ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
00024 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
00025 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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00029 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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00032 
00033 // This file was automatically generated.
00034 // Do not edit this file.
00035 
00036 #if !defined(_XED_ENCODER_IFORMS_H_)
00037 # define _XED_ENCODER_IFORMS_H_
00038 #include "xed-types.h"
00039 typedef struct xed_encoder_iforms_s {
00040     xed_uint32_t x_MEMDISPv;
00041     xed_uint32_t x_SIBBASE_ENCODE_SIB1;
00042     xed_uint32_t x_VEX_MAP_ENC;
00043     xed_uint32_t x_SIB_NT;
00044     xed_uint32_t x_UIMM8_1;
00045     xed_uint32_t x_SIBBASE_ENCODE;
00046     xed_uint32_t x_VEX_ESCVL_ENC;
00047     xed_uint32_t x_PREFIX_ENC;
00048     xed_uint32_t x_VEXED_REX;
00049     xed_uint32_t x_REMOVE_SEGMENT;
00050     xed_uint32_t x_VSIB_ENC;
00051     xed_uint32_t x_EVEX_REXB_ENC;
00052     xed_uint32_t x_MODRM_RM_ENCODE_EA64_SIB0;
00053     xed_uint32_t x_VEX_REXXB_ENC;
00054     xed_uint32_t x_EVEX_REXRR_ENC;
00055     xed_uint32_t x_AVX512_EVEX_BYTE3_ENC;
00056     xed_uint32_t x_EVEX_REXW_VVVV_ENC;
00057     xed_uint32_t x_VEX_REG_ENC;
00058     xed_uint32_t x_UISA_SE_IMM8;
00059     xed_uint32_t x_SIMM8;
00060     xed_uint32_t x_XOP_MAP_ENC;
00061     xed_uint32_t x_MODRM_RM_ENCODE_EA32_SIB0;
00062     xed_uint32_t x_UIMM8;
00063     xed_uint32_t x_MODRM_RM_ENCODE_EA16_SIB0;
00064     xed_uint32_t x_XOP_REXXB_ENC;
00065     xed_uint32_t x_EVEX_MAP_ENC;
00066     xed_uint32_t x_MEMDISP8;
00067     xed_uint32_t x_MODRM_RM_ENCODE;
00068     xed_uint32_t x_REX_PREFIX_ENC;
00069     xed_uint32_t x_UIMM16;
00070     xed_uint32_t x_VEX_TYPE_ENC;
00071     xed_uint32_t x_EVEX_UPP_ENC;
00072     xed_uint32_t x_VEX_REXR_ENC;
00073     xed_uint32_t x_BRDISP32;
00074     xed_uint32_t x_MEMDISP32;
00075     xed_uint32_t x_MEMDISP16;
00076     xed_uint32_t x_SIBINDEX_ENCODE;
00077     xed_uint32_t x_SE_IMM8;
00078     xed_uint32_t x_UIMM32;
00079     xed_uint32_t x_SIMMz;
00080     xed_uint32_t x_UIMMv;
00081     xed_uint32_t x_EVEX_62_REXR_ENC;
00082     xed_uint32_t x_DISP_NT;
00083     xed_uint32_t x_MODRM_MOD_ENCODE;
00084     xed_uint32_t x_MEMDISP;
00085     xed_uint32_t x_VSIB_ENC_BASE;
00086     xed_uint32_t x_BRDISP8;
00087     xed_uint32_t x_BRDISPz;
00088     xed_uint32_t x_EVEX_REXX_ENC;
00089     xed_uint32_t x_XOP_TYPE_ENC;
00090 } xed_encoder_iforms_t;
00091 #endif

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